Efficient substitution of multiple constant multiplications by shifts and additions using iterative pairwise matching

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Efficient substitution of multiple constant multiplications by shifts and additions using iterative pairwise matching

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Annual ACM IEEE Design Automation Conference archive
Proceedings of the 31st annual Design Automation Conference table of contents

San Diego, California, United States

Pages: 189 - 194

Year of Publication: 1994

ISBN:0-89791-653-0

Authors

Miodrag Potkonjak	C&C Research Laboratories, NEC, Inc., Princeton, NJ
Mani B. Srivastava	AT&T Bell Laboratories, Murray Hill, NJ
Anantha Chandrakasan	University of California, Dept. of EECS, Berkeley, CA

Sponsors

IEEE-CAS : Circuits & Systems
SIGDA: ACM Special Interest Group on Design Automation
EDAC : Electronic Design Automation Consortium

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 9, Downloads (12 Months): 47, Citation Count: 12

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references cited by index terms collaborative colleagues

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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CITED BY 12

	Lisa Guerra , Miodrag Potkonjak , Jan Rabaey, A methodology for guided behavioral-level optimization, Proceedings of the 35th annual conference on Design automation, p.309-314, June 15-19, 1998, San Francisco, California, United States
	Mahesh Mehendale , G. Venkatesh , S. D. Sherlekar, Optimized code generation of multiplication-free linear transforms, Proceedings of the 33rd annual conference on Design automation, p.41-46, June 03-07, 1996, Las Vegas, Nevada, United States
	Mahesh Mehendale , S. D. Sherlekar , G. Venkatesh, Synthesis of multiplier-less FIR filters with minimum number of additions, Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design, p.668-671, November 05-09, 1995, San Jose, California, United States
	In-Cheol Park , Hyeong-Ju Kang, Digital filter synthesis based on minimal signed digit representation, Proceedings of the 38th conference on Design automation, p.468-473, June 2001, Las Vegas, Nevada, United States
	Hyeong Ju Kang , Hansoo Kim , In Cheol Park, FIR filter synthesis algorithms for minimizing the delay and the number of adders, Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design, November 05-09, 2000, San Jose, California
	Mani Srivastava , Miodrag Potkonjak, Power optimization in programmable processors and ASIC implementations of linear systems: transformation-based approach, Proceedings of the 33rd annual conference on Design automation, p.343-348, June 03-07, 1996, Las Vegas, Nevada, United States
	Vagner S. Rosa , Eduardo Costa , José C. Monteiro , Sergio Bampi, An improved synthesis method for low power hardwired FIR filters, Proceedings of the 17th symposium on Integrated circuits and system design, September 07-11, 2004, Pernambuco, Brazil
	David A. Parker , Keshab K. Parhi, Low-Area/Power Parallel FIR Digital Filter Implementations, Journal of VLSI Signal Processing Systems, v.17 n.1, p.75-92, Sept. 1997
	Francky Catthoor , Martin Janssen , Lode Nachtergaele , Hugo De Man, System-Level Data-Flow Transformation Exploration andPower-Area Trade-offs Demonstrated on Video Codecs, Journal of VLSI Signal Processing Systems, v.18 n.1, p.39-50, Jan. 1998
	Martin Janssen , Francky Catthoor , Hugo de Man, A Specification Invariant Technique for Regularity Improvement between Flow-Graph Clusters, Proceedings of the 1996 European conference on Design and Test, p.138, March 11-14, 1996
	K.G. Smitha , A.P. Vinod, Low Power Realization and Synthesis of Higher-Order FIR Filters Using an Improved Common Subexpression Elimination Method, IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, v.E91-A n.11, p.3282-3292, November 2008
	Eduardo Costa , Paulo Flores , José Monteiro, Exploiting general coefficient representation for the optimal sharing of partial products in MCMs, Proceedings of the 19th annual symposium on Integrated circuits and systems design, August 28-September 01, 2006, Ouro Preto, MG, Brazil