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Cost of silicon viewed from VLSI design perspective
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Source Annual ACM IEEE Design Automation Conference archive
Proceedings of the 31st annual Design Automation Conference table of contents
San Diego, California, United States
Pages: 135 - 142  
Year of Publication: 1994
ISBN:0-89791-653-0
Author
Wojciech Maly  Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, Pennsylvania
Sponsors
IEEE-CAS : Circuits & Systems
SIGDA: ACM Special Interest Group on Design Automation
EDAC : Electronic Design Automation Consortium
Publisher
ACM  New York, NY, USA
Bibliometrics
Downloads (6 Weeks): 4,   Downloads (12 Months): 25,   Citation Count: 7
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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
M. Komiya, "Future Technological and Economic Prospects for VLSI, " ISSCC 93, pp. 16-19.
 
2
C. R. Barrett, "Microprocessor Evolution and Technology Impact," 1993 Symposium on VLSI Technology, May 17-19, Kyoto, pp. 7-10.
 
3
W. J. Spencer, "National Interests in Global Semiconductor Industry," Keynote Speech, IEDM-93, Washington D.C., Dec. 5-8, 1993.
 
4
Word News, Solid State Technology, September 1993.
 
5
"The Siege of Intel," The Economist, February 12, pp. 63-64.
 
6
"Status 1993 - A report on the Integrated Circuit Industry," Integrated Circuits Engineering Corporation.
 
7
C. R. Deninger, "Fabs of the 2000," Techcon 90, San Jose, Oct. 16-18, 1990 pp. 276-278.
 
8
T. Masuchara, K. Itoh, K. Seki and K. Sasaki, "VLSI Memories: Present Status and Future Prospects," IEICE Trans. Vol. E 74. No 1, January 1991.
 
9
V. Menon, "Microcontamination, Defect Measurement and Control in ULSI Manufacturing," Techcon 90, San Jose, Oct. 16-18, 1990 pp. 224.
 
10
W. Maly, "Evolution of Microelectronics from the Cost of Manufacturing Perspective," Research Report No. CMUCAD-91-16, September 1991.
 
11
Y. Tarui, et al., "New DRAM pricing trends: The Bi rule," IEEE Circuits & Design, March 1991, pp. 44-45.
 
12
W. Maly, H. Jacobs and A. Kersch, " Estimation of Wafer Cost for Technology Design," IEDM-93, Washington D.C., Dec. 5-8, 1993, pp. 35.6.1 - 35.6.4.
 
13
I.A. Saadat, M.T. Thomas, A. Gattiker and W. Maly," Wafer Cost Modeling and Analysis for Strategy Planning Purposes," Eight Annual SRC/ARPA CIM-IC Workshop, Aug. 1993.
 
14
L. Gwennap, "Estimating IC Manufacturing Costs," Microprocessor Report, Aug. 2, 1993, pp. 12-16.
 
15
 
16
E. Neacy, et. al., "Cost Analysis for Multiple Product/Multiple Process Factory: Application of SEMATECH's Future Factory Design Methodology," 4-th Annual ASMC, Boston, Oct. 18-19, pp. 212-219
 
17
SIA Technology Road Map - Workshop Conclusions; November 1993.
 
18
M. Ogirima, "Process Innovation for Future Semiconductor Industry," 1993 Symposium on VLSI Technology, May 17-19, 1993, Kyoto, pp. 1-5.
 
19
M. Moslehi, et al., "Microelectronics Manufacturing Science and Technology (MMST) : Single Wafer RTP-Based 0.35 mm CMOS Fabrication", IEDM-93, Washington D.C., Dec. 5-8, 1993, pp. 27.1.1 - 27.1.4.
 
20
A.V. Ferris-Prabhu, "Parameters for optimization of device productivity at wafer level," IBM Burlington Technical Bulletin, TR 19.90488, Nov. 1989.
 
21
H.T. Heineken and W. Maly, "Manufacturability Analysis Environment - MAPEX", to appear in Proc. of CICC-94.
 
22
F. Abu-Nofal, et. al. "A Three Million-Transistors Microprocessor ", 1993 ISSCC, Feb. 1993, pp. 108-109.
 
23
IEEE Spectrum, Dec. 1993, pp. 20-25.
 
24
Proc. of ISSCC 1991, 1992, 1993 and CICC of 1989.
 
25
W. Maly, "Computer-Aided Design for VLSI Circuit Manufacturability," Proc. of IEEE, Vol. 78, No. 2, Feb. 1990, pp. 356- 392.
 
26
W. Maly, H.T. Heineken and F. Agricola," Yield Model for Manufacturing Strategy Planning and Product Shrink Applications," to be published.
 
27
T. W. Williams," Test Technology 20 Years and Beyond", ITC1989, Washington D.C.p.7.
 
28
P.K. Chatterjee and G.B. Larrabee, " ULSI Research and Development in the United States: Status and Outlook," Proc. of the Fourth International Symposium on ULSI Science and Technology, 1993, pp. 1-19.
 
29
 
30
W. Maly, D. Feltham, A. Gattiker, M. Hobaugh, K. Backus and M. Thomas, "Multi-Chip Module Smart Substrate System," Accepted for publication in IEEE Design and Test Magazine, June 1994.
 
31
A. Gattiker, W. Maly and M. Thomas, "Are There Any Alternatives to Known Good Die?", to appear in Proceedings of IEEE Multi-Chip Module Conference, March 1994.
 
32
T.E. Marchok and W. Maly, "Automatic Synthesis and the Cost of Testing", to appear in Proc. of CICC-94.
 
33
Z.J. Lamnios, Beyond MMST: The virtual factory," Solid State Technology, Feb. 1994, pp. 25-26.