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ASTRX/OBLX: tools for rapid synthesis of high-performance analog circuits

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Annual ACM IEEE Design Automation Conference archive
Proceedings of the 31st annual Design Automation Conference table of contents

San Diego, California, United States

Pages: 24 - 30

Year of Publication: 1994

ISBN:0-89791-653-0

Authors

Emil S. Ochotta	Electrical and Computer Engineering Department, Carnegie Mellon University, Pittsburgh, PA
Rob A. Rutenbar	Electrical and Computer Engineering Department, Carnegie Mellon University, Pittsburgh, PA
L. Richard Carley	Electrical and Computer Engineering Department, Carnegie Mellon University, Pittsburgh, PA

Sponsors

IEEE-CAS : Circuits & Systems
SIGDA: ACM Special Interest Group on Design Automation
EDAC : Electronic Design Automation Consortium

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 1, Downloads (12 Months): 17, Citation Count: 8

Additional Information:

references cited by index terms collaborative colleagues

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	E.S. Ochotta, R.A. Rutenbar, and L.R. Carley, "Equation-Free Synthesis of High-Performance Linear Analog Circuits," Proc. 1992 Brown/MIT Conf., The MIT Press.
	2	E. Berkcan , M. d'Abreu , W. Laughton, Analog compilation based on successive decompositions, Proceedings of the 25th ACM/IEEE conference on Design automation, p.369-375, June 12-15, 1988, Atlantic City, New Jersey, United States
	3	M. Degrauwe et al., "Towards an analog system design environment," IEEE JSSC, vol. sc-24, no. 3, June 1989.
	4	G. Gielen, et al., "Analog circuit design optimization based on symbolic simulation and simulated annealing," IEEE JSSC, vol. 25, June 1990.
	5	R. Harjani, R.A. Rutenbar and L.R. Carley, "OASYS: a framework for analog circuit synthesis," IEEE Trans. CAD, vol. 8, no. 12, Dec. 1989.
	6	J. E Harvey, et al., "STAIC: An Interactive Framework for Synthesizing CMOS and BiCMOS Analog Circuits," IEEE Trans. CAD, Nov. 1992.
	7	H.Y. Koh, C.H. Sequin, and P.R. Gray, "OPASYN: a compiler for MOS operational amplifiers," IEEE Trans. CAD, vol. 9, no. 2, Feb. 1990.
	8	P. C. Maulik , L. R. Carley , R. A. Rutenbar, A mixed-integer nonlinear programming approach to analog circuit synthesis, Proceedings of the 29th ACM/IEEE conference on Design automation, p.698-703, June 08-12, 1992, Anaheim, California, United States
	9	B.J. Sheu, et al., "A Knowledge-Based Approach to Analog IC Design," IEEE Trans. Circuits and Systems, CAS-35(2):256-258, 1988.
	10	F. V. Fernández , A. Rodríguez-Vázquez , J. D. Martín , J. L. Huertas, Accurate simplification of large symbolic formulae, 1992 IEEE/ACM international conference proceedings on Computer-aided design, p.318-321, December 1992, Santa Clara, California, United States
	11	R.A. Rohrer, "Fully Automatic Network Design by Digital Computer, Preliminary Considerations," Proc. IEEE vol. 55, Nov. 1967.
	12	W. Nye, et al., "DELIGHT.SPICE: an optimization-based system for the design of integrated circuits," IEEE Trans. CAD, vol. 7, April 1988.
	13	R.A. Rohrer, et al., "AWE Inspired," Proc. IEEE CICC, May 1993.
	14	S. Kirkpatrick, C.D. Gelatt, M.E Vecchi, "Optimization by simulated annealing," Science, vol. 220, no. 4598, 13 May 183.
	15	F. Romeo and A. Sangiovanni-Vincintelli, "A Theoretical Framework for Simulated Annealing", Algorithmica (1991), 6: 302-345.
	16	J. M. Cohn, et al., "KOAN/ANAGRAM II: New Tools for Device-Level Analog Placement and Routing," IEEE JSSC, vol. 26, no. 3, March, 1991.
	17	Jimmy Lam , Jean-Marc Delosme, Performance of a new annealing schedule, Proceedings of the 25th ACM/IEEE conference on Design automation, p.306-311, June 12-15, 1988, Atlantic City, New Jersey, United States
	18	Emilian Stephen Ochotta, Synthesis of high-performance analog cells in ASTRX/OBLX, Carnegie Mellon University, Pittsburgh, PA, 1994
	19	S. Hustin and A. Sangiovanni-Vincentelli, "TIM, a new standard cell placement program based on the simulated annealing algorithm", presented at IEEE Physical Design Workshop on Placement and Floorplanning, Hilton Head, SC, April 1987.
	20	S.B. Gelfand and S.K. Mitter, "Simulated Annealing Type Algorithms for Multivariate Optimization," Algorithmica (1991), 6: 419-436.
	21	W. Swartz and C. Sechen, "New Algorithms for the Placement and Routing of Macrocells," Proc. IEEE ICCAD, pp. 336-339, Nov. 1990.
	22	E.S. Ochotta, L.R. Carley, and R.A. Rutenbar, "Analog Circuit Synthesis for Large, Realistic Cells: Designing a Pipelined A/D Converter with ASTRX/OBLX," Proc. CICC, May 1994.
	23	Metasoft Corp. HSPICE manual, 1990.
	24	B. Sheu, et al., "BSIM: Berkeley short-channel IGFET model for MOS transistors," IEEE JSSC, vol. sc-22, no. 4, Aug. 1987.
	25	K. Nakamura and L.R. Carley, "A current-based positive-feedback technique for efficient cascode bootstrapping," Proc. VLSI Circuits Symposium, June 1991.

CITED BY 8

	Franky Leyn , Georges Gielen , Willy Sansen, An efficient DC root solving algorithm with guaranteed convergence for analog integrated CMOS circuits, Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design, p.304-307, November 08-12, 1998, San Jose, California, United States
	Alex Doboli , Adrian Nunez-Aldana , Nagu Dhanwada , Sree Ganesan , Ranga Vemuri, Behavioral synthesis of analog systems using two-layered design space exploration, Proceedings of the 36th ACM/IEEE conference on Design automation, p.951-957, June 21-25, 1999, New Orleans, Louisiana, United States
	Francky Leyn , Walter Daems , Georges Gielen , Willy Sansen, A behavioral signal path modeling methodology for qualitative insight in and efficient sizing of CMOS opamps, Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design, p.374-381, November 09-13, 1997, San Jose, California, United States
	Tamal Mukherjee , L. R. Carley , R. A. Rutenbar, Synthesis of manufacturable analog circuits, Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design, p.586-593, November 06-10, 1994, San Jose, California, United States
	N. Horta, Analogue and Mixed-Signal Systems Topologies Exploration Using Symbolic Methods, Analog Integrated Circuits and Signal Processing, v.31 n.2, p.161-176, May 2002
	Jianfeng Shao , Ramesh Harjani, Macromodeling of analog circuits for hierarchical circuit design, Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design, p.656-663, November 06-10, 1994, San Jose, California, United States
	R. Vemuri , G. Wolfe, Adaptive sampling and modeling of analog circuit performance parameters with pseudo-cubic splines, Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design, p.931-938, November 07-11, 2004
	Alex Doboli , Ranga Vemuri, A VHDL-AMS compiler and architecture generator for behavioral synthesis of analog systems, Proceedings of the conference on Design, automation and test in Europe, p.71-es, January 1999, Munich, Germany