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Combining static and dynamic scheduling on distributed-memory multiprocessors
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Source International Conference on Supercomputing archive
Proceedings of the 8th international conference on Supercomputing table of contents
Manchester, England
Pages: 186 - 195  
Year of Publication: 1994
ISBN:0-89791-665-4
Authors
Oscar Plata  Dept. Electrónica y Computación, University of Santiago de Compostela, E-15706 Santiago de Compostela, SPAIN
Francisco F. Rivera  Dept. Electrónica y Computación, University of Santiago de Compostela, E-15706 Santiago de Compostela, SPAIN
Sponsor
SIGARCH: ACM Special Interest Group on Computer Architecture
Publisher
ACM  New York, NY, USA
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ABSTRACT

Loops are a large source of parallelism for many numerical applications. An important issue in the parallel execution of loops is how to schedule them so that the workload is well balanced among the processors. Most existing loop scheduling algorithms were designed for shared-memory multiprocessors, with uniform memory access costs. These approaches are not suitable for distributed-memory multiprocessors where data locality is a major concern and communication costs are high. This paper presents a new scheduling algorithm in which data locality is taken into account. Our approach combines both worlds, static and dynamic scheduling, in a two-level (overlapped) fashion. This way data locality is considered and communication costs are limited. The performance of the new algorithm is evaluated on a CM-5 message-passing distributed-memory multiprocessor.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
BB91
Belkhale, K. P. and Banerjee, P.," A Scheduling Algorithm for Parallelizable Dependent Tasks", in 5th IEEE Int. Parallel Processing Symp., Apr. 1991, pp. 500-506.
 
HP93
HSF92
 
KW85
LS93
 
LSL92
Liu, J., Saletore, V. A. and Lewis, T. G., "Scheduling Parallel Loops with Variable Length Iteration Execution Times on Parallel Computers", in ISMM Int. Conf. on Parallel and Distributed Computing Systems, Oct. 1992.
 
LTSS93
Li, H., Tandri, S., Stummu, M. and Sevcik, K., "Locality and Loop Scheduling on NUMA Multiprocessors", in IEEE Int. Conf. on Parallel Processing, Aug. 1993, pp. 140-147.
Luc92
 
ML94
 
PK87
 
PKP89
 
Pol88
RP89
SH86
 
SLL93
Saletore, V. A., Liu, J. and Lam, B. Y., "Scheduling Non-Uniform Parallel Loops on Distributed Memory Machines", in IEEE Int. Conf. on System Sciences, Jan. 1993, pp. 516-525.
TF92
 
Thi91
Thinking Machines Corporation, Cambridge, MA. The Connection Machine CM-5 Technical Summary, 1991.
 
TN93
 
TY86
Tang, P. and Yew, P.C., "Processor Self- Scheduling for Multiple Nested Parallel Loops", in IEEE Int. Conf. on Parallel Processing, Aug. 1986, pp. 528-535.
Zha91


Collaborative Colleagues:
Oscar Plata: colleagues
Francisco F. Rivera: colleagues