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PowerPC 603 microprocessor power management
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Communications of the ACM archive
Volume 37 ,  Issue 6  (June 1994) table of contents
Pages: 43 - 46  
Year of Publication: 1994
ISSN:0001-0782
Authors
Brad W. Suessmith  Motorola Inc., Austin, TX
George Paap, III  Motorola Inc., Austin, TX
Publisher
ACM  New York, NY, USA
Bibliometrics
Downloads (6 Weeks): 6,   Downloads (12 Months): 25,   Citation Count: 8
Additional Information:

references   cited by   index terms   collaborative colleagues  

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
Motorola Inc. Power PClm 603 RISC Micprocess. Tech. Sum-Rev. 1. 1993.

CITED BY  8
Luca Benini , Giovanni De Micheli, Transformation and synthesis of FSMs for low-power gated-clock implementation, Proceedings of the 1995 international symposium on Low power design, p.21-26, April 23-26, 1995, Dana Point, California, United States
Jacob R. Lorch , Alan Jay Smith, Reducing processor power consumption by improving processor time management in a single-user operating system, Proceedings of the 2nd annual international conference on Mobile computing and networking, p.143-154, November 1996, Rye, New York, United States
Anand Raghunathan , Sujit Dey , Niraj K. Jha , Kazutoshi Wakabayashi, Power management techniques for control-flow intensive designs, Proceedings of the 34th annual conference on Design automation, p.429-434, June 09-13, 1997, Anaheim, California, United States
Hiroyuki Okamura , Tadashi Dohi , Shunji Osaki, Performance analysis of a transaction based software system with shutdown, Proceedings of the 2nd international workshop on Software and performance, p.168-179, September 2000, Ottawa, Ontario, Canada
Arif Merchant , Benjamin Melamed , Eugen Schenfeld , Bhaskar Sengupta, Analysis of a Control Mechanism for a Variable Speed Processor, IEEE Transactions on Computers, v.45 n.7, p.793-801, July 1996
Jacob R. Lorch , Alan Jay Smith, Scheduling techniques for reducing processor energy use in MacOS, Wireless Networks, v.3 n.5, p.311-324, Oct. 1997
Michele Zorzi , Ramesh R. Rao, Error Control and Energy Consumption in Communications for Nomadic Computing, IEEE Transactions on Computers, v.46 n.3, p.279-289, March 1997
M. Favalli , L. Benini , G. de Micheli, Design for Testability of Gated-Clock FSMs, Proceedings of the 1996 European conference on Design and Test, p.589, March 11-14, 1996

INDEX TERMS

Primary Classification:
  C. Computer Systems Organization
  C.1 PROCESSOR ARCHITECTURES
      C.1.1 Single Data Stream Architectures

          Nouns: PowerPC

Additional Classification:
  B. Hardware
  B.m MISCELLANEOUS
      Subjects: Design management


General Terms:
Design, Management

Collaborative Colleagues:
Brad W. Suessmith: colleagues
George Paap, III: colleagues

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