Detecting pipeline structural hazards quickly

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Detecting pipeline structural hazards quickly

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Annual Symposium on Principles of Programming Languages archive
Proceedings of the 21st ACM SIGPLAN-SIGACT symposium on Principles of programming languages table of contents

Portland, Oregon, United States

Pages: 280 - 286

Year of Publication: 1994

ISBN:0-89791-636-0

Authors

Todd A. Proebsting	Department of Computer Science, University of Arizona, Tucson, AZ
Christopher W. Fraser	AT&T Bell Laboratories, 600 Mountain Avenue 2C-464, Murray Hill, NJ

Sponsors

SIGACT: ACM Special Interest Group on Algorithms and Computation Theory
SIGPLAN: ACM Special Interest Group on Programming Languages

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 10, Downloads (12 Months): 35, Citation Count: 20

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references cited by index terms collaborative colleagues

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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	3	David G. Bradlee , Robert R. Henry , Susan J. Eggers, The Marion system for retargetable instruction scheduling, ACM SIGPLAN Notices, v.26 n.6, p.229-240, June 1991
	4	David Gordon Bradlee. Retargetable Instruction Scheduling for Pipeline Processors. PhD thesis, University of Washington, 1991. Technical report 91-08-07, Department of Computer Science and Engineering.
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	13	MIPS Computer Systems. RISCompiler Language Programmers Guide. MIPS Computer Systems, 1988.

CITED BY 20

	R. Govindarajan , N. S. S. Narasimha Rao , E. R. Altman , Guang R. Gao, Enhanced Co-Scheduling: A Software Pipelining Method Using Modulo-Scheduled Pipeline Theory, International Journal of Parallel Programming, v.28 n.1, p.1-46, February 2000
	John C. Gyllenhaal , Wen-Mei W. Hwu , B. Ramakrishna Rau, Optimization of Machine Descriptions for Efficient Use, International Journal of Parallel Programming, v.26 n.4, p.417-447, August 1998
	John C. Gyllenhaal , Wen-mei W. Hwu , B. Ramabriohna Rau, Optimization of machine descriptions for efficient use, Proceedings of the 29th annual ACM/IEEE international symposium on Microarchitecture, p.349-358, December 02-04, 1996, Paris, France
	Eric Schnarr , James R. Larus, Instruction scheduling and executable editing, Proceedings of the 29th annual ACM/IEEE international symposium on Microarchitecture, p.288-297, December 02-04, 1996, Paris, France
	Alexandre E. Eichenberger , Edward S. Davidson, A reduced multipipeline machine description that preserves scheduling constraints, ACM SIGPLAN Notices, v.31 n.5, p.12-22, May 1996
	Dawson R. Engler , Todd A. Proebsting, DCG: an efficient, retargetable dynamic code generation system, ACM SIGPLAN Notices, v.29 n.11, p.263-272, Nov. 1994
	Vasanth Bala , Norman Rubin, Efficient instruction scheduling using finite state automata, Proceedings of the 28th annual international symposium on Microarchitecture, p.46-56, November 29-December 01, 1995, Ann Arbor, Michigan, United States
	V. Janaki Ramanan , R. Govindarajan, Resource usage models for instruction scheduling: two new models and a classification, Proceedings of the 13th international conference on Supercomputing, p.417-424, June 20-25, 1999, Rhodes, Greece
	Eric Goubault, Schedulers as abstract interpretations of higher-dimensional automata, Proceedings of the 1995 ACM SIGPLAN symposium on Partial evaluation and semantics-based program manipulation, p.134-145, June 21-23, 1995, La Jolla, California, United States
	Mark W. Bailey , Jack W. Davidson, A formal model and specification language for procedure calling conventions, Proceedings of the 22nd ACM SIGPLAN-SIGACT symposium on Principles of programming languages, p.298-310, January 23-25, 1995, San Francisco, California, United States
	Qin Zhao , Bart Mesman , Twan Basten, Static resource models for code-size efficient embedded processors, ACM Transactions on Embedded Computing Systems (TECS), v.2 n.2, p.219-250, May 2003
	Mark W. Bailey , Jack W. Davidson, Automatic Detection and Diagnosis of Faults in Generated Code for Procedure Calls, IEEE Transactions on Software Engineering, v.29 n.11, p.1031-1042, November 2003
	Peter Grun , Ashok Halambi , Nikil Dutt , Alex Nicolau, RTGEN: an algorithm for automatic generation of reservation tables from architectural descriptions, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.11 n.4, p.731-737, August 2003
	K. Ananda Vardhan , Y. N. Srikant, Transition aware scheduling: increasing continuous idle-periods in resource units, Proceedings of the 2nd conference on Computing frontiers, May 04-06, 2005, Ischia, Italy
	Christopher W. Milner , Jack W. Davidson, Quick piping: a fast, high-level model for describing processor pipelines, ACM SIGPLAN Notices, v.37 n.7, July 2002
	Lisbeth Fajstrup , Martin Raußen , Eric Goubault, Algebraic topology and concurrency, Theoretical Computer Science, v.357 n.1, p.241-278, 25 July 2006
	Matthew J. Bridges , Neil Vachharajani , Guilherme Ottoni , David I. August, Automatic instruction scheduler retargeting by reverse-engineering, ACM SIGPLAN Notices, v.41 n.6, June 2006
	Peter Grun , Ashok Halambi , Nikil Dutt , Alex Nicolau, RTGEN: An Algorithm for Automatic Generation of Reservation Tables from Architectural Descriptions, Proceedings of the 12th international symposium on System synthesis, p.44, November 01-04, 1999
	Pekka Jääskeläinen , Vladimír Guzma , Viljami Korhonen, Resource conflict detection in simulation of function unit pipelines, Journal of Systems Architecture: the EUROMICRO Journal, v.54 n.11, p.1058-1064, November, 2008
	Ed Harcourt, Policies of System Level Pipeline Modeling, Electronic Notes in Theoretical Computer Science (ENTCS), v.238 n.2, p.13-23, June, 2009