Preliminary experiences with the Fortran D compiler

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Preliminary experiences with the Fortran D compiler

Source

Conference on High Performance Networking and Computing archive
Proceedings of the 1993 ACM/IEEE conference on Supercomputing table of contents

Portland, Oregon, United States

Pages: 338 - 350

Year of Publication: 1993

ISBN:0-8186-4340-4

Authors

C.-W. Tseng
S. Hiranandani
K. Kennedy

Sponsor

SIGARCH: ACM Special Interest Group on Computer Architecture

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): n/a, Downloads (12 Months): n/a, Citation Count: 19

Additional Information:

cited by index terms collaborative colleagues

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CITED BY 19

	Atsushi Kubota , Shogo Tatsumi , Toshihiko Tanaka , Masahiro Goshima , Shin-Ichiro Mori , Hiroshi Nakashima , Shinji Tomita, A Technique to Eliminate Redundant Inter-Processor Communication on Parallelizing Compiler TINPAR, International Journal of Parallel Programming, v.27 n.2, p.97-109, April 1999
	David F. Bacon , Susan L. Graham , Oliver J. Sharp, Compiler transformations for high-performance computing, ACM Computing Surveys (CSUR), v.26 n.4, p.345-420, Dec. 1994
	Seema Hiranandani , Ken Kennedy , Chau-Wen Tseng , Scott Warren, The D editor: a new interactive parallel programming tool, Proceedings of the 1994 conference on Supercomputing, p.733-ff., December 1994, Washington, D.C., United States
	Jaspal Subhlok , David R. O'Hallaron , Thomas Gross , Peter A. Dinda , Jon Webb, Communication and memory requirements as the basis for mapping task and data parallel programs, Proceedings of the 1994 conference on Supercomputing, p.330-339, December 1994, Washington, D.C., United States
	Vikram Adve , Guohua Jin , John Mellor-Crummey , Qing Yi, High performance Fortran compilation techniques for parallelizing scientific codes, Proceedings of the 1998 ACM/IEEE conference on Supercomputing (CDROM), p.1-23, November 07-13, 1998, San Jose, CA
	Vikram S. Adve , John Mellor-Crummey , Mark Anderson , Jhy-Chun Wang , Daniel A. Reed , Ken Kennedy, An integrated compilation and performance analysis environment for data parallel programs, Proceedings of the 1995 ACM/IEEE conference on Supercomputing (CDROM), p.50-es, December 04-08, 1995, San Diego, California, United States
	Ravi Mirchandaney , Seema Hiranandani , Ajay Sethi, Improving the performance of DSM systems via compiler involvement, Proceedings of the 1994 conference on Supercomputing, p.763-772, December 1994, Washington, D.C., United States
	Heidi E. Ziegler , Mary W. Hall , Pedro C. Diniz, Compiler-generated communication for pipelined FPGA applications, Proceedings of the 40th conference on Design automation, June 02-06, 2003, Anaheim, CA, USA
	Jaspal Subhlok , David R. O'Hallaron , Thomas Gross , Peter A. Dinda , Jon Webb, Communication and memory requirements as the basis for mapping task and data parallel programs, Proceedings of the 1994 ACM/IEEE conference on Supercomputing, November 14-18, 1994, Washington, D.C.
	William Pugh , Evan Rosser, Iteration space slicing and its application to communication optimization, Proceedings of the 11th international conference on Supercomputing, p.221-228, July 07-11, 1997, Vienna, Austria
	Ravi Mirchandaney , Seema Hiranandani , Ajay Sethi, Improving the performance of DSM systems via compiler involvement, Proceedings of the 1994 ACM/IEEE conference on Supercomputing, November 14-18, 1994, Washington, D.C.
	Seema Hiranandani , Ken Kennedy , Chau Wen Tseng , Scott Warren, The D editor: a new interactive parallel programming tool, Proceedings of the 1994 ACM/IEEE conference on Supercomputing, November 14-18, 1994, Washington, D.C.
	Vikram Adve , John Mellor-Crummey, Using integer sets for data-parallel program analysis and optimization, ACM SIGPLAN Notices, v.33 n.5, p.186-198, May 1998
	Gagan Agrawal , Alan Sussman , Joel Saltz, An Integrated Runtime and Compile-Time Approach for Parallelizing Structured and Block Structured Applications, IEEE Transactions on Parallel and Distributed Systems, v.6 n.7, p.747-754, July 1995
	Heidi Ziegler , Mary Hall, Evaluating heuristics in automatically mapping multi-loop applications to FPGAs, Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field-programmable gate arrays, February 20-22, 2005, Monterey, California, USA
	Peter Steenkiste, Network-Based Multicomputers: A Practical Supercomputer Architecture, IEEE Transactions on Parallel and Distributed Systems, v.7 n.8, p.861-875, August 1996
	Antonia Zhai , J. Gregory Steffan , Christopher B. Colohan , Todd C. Mowry, Compiler and hardware support for reducing the synchronization of speculative threads, ACM Transactions on Architecture and Code Optimization (TACO), v.5 n.1, p.1-33, May 2008
	Kazuaki Ishizaki , Hideaki Komatsu , Toshio Nakatani, A Loop Transformation Algorithm for Communication Overlapping, International Journal of Parallel Programming, v.28 n.2, p.135-154, April 2000
	Alexey L. Lastovetsky, mpC: a multi-paradigm programming language for massively parallel computers, ACM SIGPLAN Notices, v.31 n.2, p.13-20, Feb. 1996