A concurrent dynamic analysis framework for multicore hardware

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A concurrent dynamic analysis framework for multicore hardware

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Conference on Object Oriented Programming Systems Languages and Applications archive
Proceeding of the 24th ACM SIGPLAN conference on Object oriented programming systems languages and applications table of contents

Orlando, Florida, USA

SESSION: Reliability and monitoring table of contents

Pages 155-174

Year of Publication: 2009

ISBN:978-1-60558-766-0

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Authors

Jungwoo Ha	University of Southern California - Information Sciences Institute East, Arlington, VA, USA
Matthew Arnold	IBM T. J. Watson Research, Hawthorne, NY, USA
Stephen M. Blackburn	Australian National University, Canberra, Australia
Kathryn S. McKinley	The University of Texas at Austin, Austin, TX, USA

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SIGPLAN: ACM Special Interest Group on Programming Languages

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ACM New York, NY, USA

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Downloads (6 Weeks): 32, Downloads (12 Months): 32, Citation Count: 0

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ABSTRACT

Software has spent the bounty of Moore's law by solving harder problems and exploiting abstractions, such as high-level languages, virtual machine technology, binary rewriting, and dynamic analysis. Abstractions make programmers more productive and programs more portable, but usually slow them down. Since Moore's law is now delivering multiple cores instead of faster processors, future systems must either bear a relatively higher cost for abstractions or use some cores to help tolerate abstraction costs.

This paper presents the design, implementation, and evaluation of a novel concurrent, configurable dynamic analysis framework that efficiently utilizes multicore cache architectures. It introduces Cache-friendly Asymmetric Buffering (CAB), a lock-free ring-buffer that implements efficient communication between application and analysis threads. We guide the design and implementation of our framework with a model of dynamic analysis overheads. The framework implements exhaustive and sampling event processing and is analysis-neutral. We evaluate the framework with five popular and diverse analyses, and show performance improvements even for lightweight, low-overhead analyses.

Efficient inter-core communication is central to high performance parallel systems and we believe the CAB design gives insight into the subtleties and difficulties of attaining it for dynamic analysis and other parallel software.

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