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Hierarchical architecture of flash-based storage systems for high performance and durability
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Source Annual ACM IEEE Design Automation Conference archive
Proceedings of the 46th Annual Design Automation Conference table of contents
San Francisco, California
SESSION: How to improve your memory table of contents
Pages 907-910  
Year of Publication: 2009
ISBN:978-1-60558-497-3
Authors
Sanghyuk Jung  Hanyang University, Korea
Jin Hyuk Kim  Samsung Electronics. Co., Ltd. Korea
Yong Ho Song  Hanyang University, Korea
Sponsors
EDAC : Electronic Design Automation Consortium
SIGDA: ACM Special Interest Group on Design Automation
IEEE-CAS : Circuits & Systems
Publisher
ACM  New York, NY, USA
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ABSTRACT

The use of NAND flash memory for building permanent storage has been increasing in many embedded systems due to properties such as non-volatility and low energy consumption. The persistent requirements for high storage capacity have given rise to the increase of bit density per cell as in multi-level cells but this has come at the expense of performance and has resulted in degradation of durability. In this paper, we introduce a complementary approach to boost the performance and durability of MLC-based storage systems by employing a non-volatile buffer that temporarily holds the data heading to MLCs. We also propose algorithms to efficiently eliminate unnecessary write and erase operations in MLCs by performing a pre-merge in the buffer. Our experiments show that the proposed approach can increase performance by up to 4 times and durability by 4 times by adding only a small hardware cost.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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