Software-assisted hardware reliability

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Software-assisted hardware reliability: abstracting circuit-level challenges to the software stack

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Annual ACM IEEE Design Automation Conference archive
Proceedings of the 46th Annual Design Automation Conference table of contents

San Francisco, California

SESSION: Scheduling, allocation and reliability table of contents

Pages 788-793

Year of Publication: 2009

ISBN:978-1-60558-497-3

Authors

Vijay Janapa Reddi	Harvard University, Cambridge
Meeta S. Gupta	Harvard University, Cambridge
Michael D. Smith	Harvard University, Cambridge
Gu-yeon Wei	Harvard University, Cambridge
David Brooks	Harvard University, Cambridge
Simone Campanoni	Politecnico di Milano, Milano, Italy

Sponsors

EDAC : Electronic Design Automation Consortium
SIGDA: ACM Special Interest Group on Design Automation
IEEE-CAS : Circuits & Systems

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ACM New York, NY, USA

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Downloads (6 Weeks): 15, Downloads (12 Months): 15, Citation Count: 0

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ABSTRACT

Power constrained designs are becoming increasingly sensitive to supply voltage noise. We propose a hardware-software collaborative approach to enable aggressive operating margins: a checkpoint-recovery mechanism corrects margin violations, while a run-time software layer reschedules the program's instruction stream to prevent recurring margin crossings at the same program location. The run-time layer removes 60% of these events with minimal overhead, thereby significantly improving overall performance.

REFERENCES

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