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From milliwatts to megawatts: system level power challenge
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Source Annual ACM IEEE Design Automation Conference archive
Proceedings of the 46th Annual Design Automation Conference table of contents
San Francisco, California
PANEL SESSION: Panel table of contents
Pages 750-751  
Year of Publication: 2009
ISBN:978-1-60558-497-3
Authors
Ruchir Puri  IBM TJ Watson Research Center, Yorktown Hts, NY
Eshel Haritan  Coware Inc., San Jose, CA
Stan Krolikoski  Cadence Design Systems, San Jose, CA
Jason Cong  University of California, Los Angeles, CA
Tim Kogel  Coware Inc., Aachen, Germany
Bradley McCredie  IBM Corporation, Austin, TX
John Shen  Nokia Research Center, Palo Alto, CA
Andres Takach  Mentor Graphics Corporation, Wilsonville, OR
Sponsors
EDAC : Electronic Design Automation Consortium
SIGDA: ACM Special Interest Group on Design Automation
IEEE-CAS : Circuits & Systems
Publisher
ACM  New York, NY, USA
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ABSTRACT

This panel discusses power optimization at the system level. What are the needs and opportunities? What are examples of successful practices? Can system-level power optimizations ever be automated? Can power optimizations be the enabling event for a methodology change in system-level design?