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PDRAM: a hybrid PRAM and DRAM main memory system
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Source Annual ACM IEEE Design Automation Conference archive
Proceedings of the 46th Annual Design Automation Conference table of contents
San Francisco, California
SESSION: Embedded system design for low-power table of contents
Pages 664-469  
Year of Publication: 2009
ISBN:978-1-60558-497-3
Authors
Gaurav Dhiman  University of California, San Diego, La Jolla, CA
Raid Ayoub  University of California, San Diego, La Jolla, CA
Tajana Rosing  University of California, San Diego, La Jolla, CA
Sponsors
EDAC : Electronic Design Automation Consortium
SIGDA: ACM Special Interest Group on Design Automation
IEEE-CAS : Circuits & Systems
Publisher
ACM  New York, NY, USA
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ABSTRACT

In this paper, we propose PDRAM, a novel energy efficient main memory architecture based on phase change random access memory (PRAM) and DRAM. The paper explores the challenges involved in incorporating PRAM into the main memory hierarchy of computing systems, and proposes a low overhead hybrid hardware-software solution for managing it. Our experimental results indicate that our solution is able to achieve average energy savings of 30% at negligible overhead over conventional memory architectures.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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