Moore's Law

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Moore's Law: another casualty of the financial meltdown?

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Annual ACM IEEE Design Automation Conference archive
Proceedings of the 46th Annual Design Automation Conference table of contents

San Francisco, California

PANEL SESSION: Panel table of contents

Pages: 202-203

Year of Publication: 2009

ISBN:978-1-60558-497-3

Authors

Jason Cong	University of California, Los Angeles, CA
N. S. Nagaraj	Texas Instrument, Dallas, TX
Ruchir Puri	IBM T J Watson Research Center, Yorktown Heights, NY
William Joyner	SRC, Research Triangle Park, NC
Jeff Burns	IBM T J Watson Research Center, Yorktown Heights, NY
Moshe Gavrielov	Xilinx, San Jose, CA
Riko Radojcic	Qualcomm, San Diego, CA
Peter Rickert	Texas Instrument, Dallas, TX
Hans Stork	Applied Materials, Santa Clara, CA

Sponsors

EDAC : Electronic Design Automation Consortium
SIGDA: ACM Special Interest Group on Design Automation
IEEE-CAS : Circuits & Systems

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 20, Downloads (12 Months): 51, Citation Count: 0

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ABSTRACT

Given the exponential increase of fabrication costs, the global recession and credit crunch, one may ask if Moore's Law is financially viable beyond 22nm node. Can we justify the return-of-investment (ROI) for continuous scaling beyond 22nm? Shall we consider other alternatives for integration, such as silicon-in-a-package (SiP) or 3D integrations?

INDEX TERMS

Primary Classification:
B. Hardware
B.7 INTEGRATED CIRCUITS
B.7.1 Types and Design Styles