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Boolean logic function synthesis for generalised threshold gate circuits
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Source Annual ACM IEEE Design Automation Conference archive
Proceedings of the 46th Annual Design Automation Conference table of contents
San Francisco, California
SESSION: Design and optimization of nanocircuits table of contents
Pages 83-86  
Year of Publication: 2009
ISBN:978-1-60558-497-3
Authors
Marek A. Bawiec  Wrocław University of Technology, Poland
Maciej Nikodem  Wrocław University of Technology, Poland
Sponsors
EDAC : Electronic Design Automation Consortium
SIGDA: ACM Special Interest Group on Design Automation
IEEE-CAS : Circuits & Systems
Publisher
ACM  New York, NY, USA
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ABSTRACT

This paper analyses negative differential resistance (NDR) based logic circuits operating in monostable-bistable transition logic element (MOBILE) regime. We formulate theoretical foundation for formal model of the generalised threshold gate (GTG) and prove that GTG can implement any, n-variable Boolean function. Moreover, we propose the algorithmic approach to GTG structure generation problem.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
T. Akeyoshi, K. Maezawa, and T. Mizutani. Weighted sum threshold logic operation of mobile using resonant-tunneling transistors. Electron Device Letters, IEEE, vol. 14(10), pp. 475--477, October 1993.
 
2
M. Avedillo, J. Quintana, H. Pettenghi, P. Kelly, and C. Thompson. Multi-threshold threshold logic circuit design using resonant tunnelling devices. Electronics Letters, vol. 39(21), pp. 1502--1504, October 2003.
 
3
M. Avedillo, J. Quintana, and H. Pettenghi. Logic models supporting the design of mobile-based rtd circuits. pp. 254--259, July 2005.
 
4
K. Berezowski. Compact binary logic circuits design using negative differential resistance devices. Electronics Letters, vol. 42(16), pp. 902--903, 2006.
 
5
T. Kim, Y. Jeong, and K. Yang. Low-power high-speed performance of current-mode logic d flip-flop topology using negative-differential-resistance devices. Circuits, Devices & Systems, IET, vol. 2(2), pp. 281--287, April 2008.
 
6
H. Kim and K. Seo. Noninverted/inverted monostabel-to-bistable transition logic element circuits using three resonant tunneling diodes and their application to a static binary frequency divider. The Japan Society of Applied Physics, vol. 47, pp. 2854--2857, 2008.
 
7
H. Pettenghi, M. Avedillo, and J. Quintana. A novel contribution to the rtd-based threshold logic family. IEEE International Symposium on Circuits and Systems, 2008, pp. 2350--2353, May 2008.
 
8
H. Pettenghi, M. J. Avedillo, and J. M. Quintana. Using multi-threshold threshold gates in rtd-based logic design: A case study. Microelectronics Journal, vol. 39(2), pp. 241--247, 2008.
 
9
Y. Zheng and C. Huang. Reconfigurable rtd-based circuit elements of complete logic functionality. Asia and South Pacific Design Automation Conference, 2008, pp. 71--76, March 2008.