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Designing heterogeneous ECU networks via compact architecture encoding and hybrid timing analysis
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Source Annual ACM IEEE Design Automation Conference archive
Proceedings of the 46th Annual Design Automation Conference table of contents
San Francisco, California
SESSION: High-performance platforms: advances in system-level exploration and optimization table of contents
Pages 43-46  
Year of Publication: 2009
ISBN:978-1-60558-497-3
Authors
Michael Glaß  University of Erlangen-Nuremberg, Germany
Martin Lukasiewycz  University of Erlangen-Nuremberg, Germany
Jürgen Teich  University of Erlangen-Nuremberg, Germany
Unmesh D. Bordoloi  Verimag, France
Samarjit Chakraborty  Technical University of Munich, Germany
Sponsors
EDAC : Electronic Design Automation Consortium
SIGDA: ACM Special Interest Group on Design Automation
IEEE-CAS : Circuits & Systems
Publisher
ACM  New York, NY, USA
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ABSTRACT

In this paper, a design method for automotive architectures is proposed. The two main technical contributions are (i) a novel hardware/software architecture encoding that unifies a number of design steps, i.e., resource allocation, process binding, message routing, scheduling, and parameter estimation for the processor and bus schedulers, and (ii) a hybrid scheme that allows different timing analysis techniques to be applied to different bus protocols (viz., CAN and FlexRay) within the same architecture in order to derive global performance estimates such as end-to-end delays of messages. The use of the compact encoding technique substantially reduces the underlying search space, and the hybrid timing analysis scheme allows the combination of known timing analysis techniques from the real-time systems domain. The proposed techniques were combined into a tool-chain and a real-life case study to illustrate their advantages.


REFERENCES

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