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Worst-case aggressor-victim alignment with current-source driver models
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Source Annual ACM IEEE Design Automation Conference archive
Proceedings of the 46th Annual Design Automation Conference table of contents
San Francisco, California
SESSION: Combating non-idealities in static timing analysis table of contents
Pages 13-18  
Year of Publication: 2009
ISBN:978-1-60558-497-3
Authors
Ravikishore Gandikota  University of Michigan
Li Ding  Synopsys, CA
Peivand Tehrani  Synopsys, CA
David Blaauw  University of Michigan
Sponsors
EDAC : Electronic Design Automation Consortium
SIGDA: ACM Special Interest Group on Design Automation
IEEE-CAS : Circuits & Systems
Publisher
ACM  New York, NY, USA
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ABSTRACT

Crosstalk delay-noise which occurs due to the simultaneous transitions of victim and aggressor drivers is very sensitive to their mutual alignment. Hence, during static noise analysis, it is crucial to identify the worst-case victim-aggressor alignment which results in the maximum delay-noise. Although several approaches have been proposed to obtain the worst-case aggressor alignment, most of them compute only the worst-case stage delay of the victim. However, in reality it is essential to compute the worst-case combined delay of victim stage and victim receiver gate [5, 9]. We propose a heuristic approach to compute the worst-case aggressor alignment which maximizes the victim receiver output arrival time. In this work, we use a novel cumulative gate overdrive voltage (CGOV) metric to model the victim receiver output transition. HSPICE simulations, performed on industrial nets to validate the proposed methodology, show an average error of 1.7% in delay-noise when compared to the worst-case alignment obtained by an exhaustive sweeping.


REFERENCES

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