System prototypes: virtual, hardware or hybrid?

ABSTRACT

Almost all SoC designs today use hardware prototyping at some point of the development cycle to perform hardware/software validation or test interfaces to real-world stimulus. Recently, virtual prototypes have emerged as a way to run system level tests and perform hardware/software co-simulation before silicon or hardware prototypes are available. Does the emergence of virtual prototyping mean the end for FPGA-based prototypes? Will the hardware prototype continue to live on as an integral part of the SoC design cycle? Will hybrids of virtual and hardware prototypes be the answer? Join our expert panelists in a spirited discussion on the best approach for speeding the verification and validation of complex SoC using system prototypes. Virtual, hardware or hybrid -- which will reign supreme?

INDEX TERMS

Primary Classification:
  B. Hardware
  B.7 INTEGRATED CIRCUITS
      B.7.2 Design Aids

Additional Classification:
  D. Software
  D.2 SOFTWARE ENGINEERING
      D.2.4 Software/Program Verification
      D.2.5 Testing and Debugging

General Terms:
Design, Economics, Measurement, Performance, Verification

Keywords:
FPGA prototype, SystemC TLM, embedded software, hardware/software co-verification, rapid prototype, system prototype, system validation, virtual platform, virtual prototype