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A recursive approach to end-to-end path latency computation in heterogeneous multiprocessor systems
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International Conference on Hardware Software Codesign archive
Proceedings of the 7th IEEE/ACM international conference on Hardware/software codesign and system synthesis table of contents
Grenoble, France
SESSION: Perfomance analysis and optimization for heterogeneous multiprocesses system table of contents
Pages 433-442  
Year of Publication: 2009
ISBN:978-1-60558-628-1
Authors
Simon Schliecker  Technische Universität Braunschweig, Braunschweig, Germany
Rolf Ernst  Technische Universität Braunschweig, Braunschweig, Germany
Sponsors
ACM: Association for Computing Machinery
SIGBED: ACM Special Interest Group on Embedded Systems
SIGMICRO: ACM Special Interest Group on Microarchitectural Research and Processing
SIGDA: ACM Special Interest Group on Design Automation
Publisher
ACM  New York, NY, USA
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ABSTRACT

This paper proposes a method for the derivation of end-to-end delays of applications that involve processing on multiple components in a heterogeneous multiprocessor system. The rocedure precisely captures the pipelined and parallel processing of multiple events along an application path by accurately capturing the resource timing and avoiding the pay-bursts-only-once problem. Both time-triggered and event-triggered task activation schemes with arbitrary event patterns are supported. In contrast to previous work, complex application topologies are allowed: The approach considers path forking and merging, as well as functional cycles and non-functional cyclic dependencies. The basis for the proposed method is an iterative compositional performance analysis, that allows computing event models in such systems. Based on the event models and local performance abstractions we propose a recursive approach to the derivation of the worst-case latency.


REFERENCES

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