| An efficient technique for analysis of minimal buffer requirements of synchronous dataflow graphs with model checking |
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International Conference on Hardware Software Codesign
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Proceedings of the 7th IEEE/ACM international conference on Hardware/software codesign and system synthesis
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Grenoble, France
SESSION: System level modeling and simulation
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Pages 61-70
Year of Publication: 2009
ISBN:978-1-60558-628-1
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Authors
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Weichen Liu
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Hong Kong University of Science and Technology, Hong Kong, Hong Kong
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Zonghua Gu
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Zhejiang University, Hangzhou, China
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Jiang Xu
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Hong Kong University of Science and Technology, Hong Kong, Hong Kong
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Yu Wang
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Tsinghua University, Beijing, China
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Mingxuan Yuan
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Hong Kong University of Science and Technology, Hong Kong, Hong Kong
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Downloads (6 Weeks): 14, Downloads (12 Months): 14, Citation Count: 0
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ABSTRACT
Synchronous Dataflow (SDF) is a widely-used model of computation for digital signal processing and multimedia applications, which are typically implemented on memory constrained hardware platforms. SDF can be statically analyzed and scheduled, and the memory requirement for correct execution can be predicted at compile time. In this paper, we present an efficient technique based on model-checking for exact analysis of minimal buffer requirement of an SDF graph to guarantee deadlock-free execution. Performance evaluation shows that our approach can achieve significant performance improvements compared to related work.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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