A high-level virtual platform for early MPSoC software development

ABSTRACT

Multiprocessor System-on-Chips (MPSoCs) are nowadays widely used, but the problem of their software development persists to be one of the biggest challenges for developers. Virtual Platforms (VPs) are introduced to the industry, which allow MPSoC software development without a hardware prototype. Nevertheless, for developers in early design stage where no VP is available, the software programming support is not satisfactory.

This paper introduces a High-level Virtual Platform (HVP) which aims at early MPSoC software development. The framework provides a set of tools for abstract MPSoC simulation and the corresponding application programming support in order to enable the development of reusable C code at a high level. The case study performed on several MPSoCs shows that the code developed on the HVP can be easily reused on different target platforms. Moreover, the high simulation speed achieved by the HVP also improves the design efficiency of software developers.

REFERENCES

• 1: Y. Ahn, K. Han, G. Lee, H. Song, J. Yoo, K. Choi, and X. Feng. SoCDAL: System-on-Chip Design AcceLerator. ACM Trans. Des. Autom. Electron. Syst., 13(1):1--38, 2008.
• 2: L. B. Brisolara, M. F. S. Oliveira, R. Redin, L. C. Lamb, L. Carro, and F. Wagner. Using UML as Front-end for Heterogeneous Software Code Generation Strategies. In DATE '08, New York, NY, USA, 2008. ACM.
• 3: CoWare. Processor Designer. http://www.coware.com/products.
• 4: P. Destro, F. Fummi, and G. Pravadelli. A Smooth Refinement Flow for Co-designing HW and SW Threads. In DATE '07, 2007.
• 5: A. Donlin. Transaction Level Modeling: Flows and Use Models. In CODES/ISSS 2004, pages 75--80, Sept. 2004.
• 6: T. Furukawa, S. Honda, H. Tomiyama, and H. Takada. A Hardware/Software Cosimulator with RTOS Supports for Multiprocessor Embedded Systems. In ICESS '07, pages 283--294, Berlin, Heidelberg, 2007. Springer-Verlag.
• 7: D. D. Gajski, J. Zhu, R. Domer, A. Gerstlauer, and S. Zhao. SpecC: Specification Language and Methodology. Springer-Verlag New York, Inc., 2000.
• 8: J. Ganssle. 500 Embedded Engineers Have Their Say About Jobs, Tools. EETimes Europe, January 2009. http://www.eetimes.eu/design/213000236;.
• 9: P. Gerin, X. Gu´erin, and F. Petrot. Efficient Implementation of Native Software Simulation for MPSoC. In DATE '08, 2008.
• 10: A. Gerstlauer, H. Yu, and D. D. Gajski. RTOS Modeling for System Level Design. In DATE '03, 2003.
• 11: C. Haubelt, T. Schlichter, J. Keinert, and M. Meredith. SystemCoDesigner: Automatic Design Space Exploration and Rapid Prototyping from Behavioral Models. In DAC '08, pages 580--585, New York, NY, USA, 2008. ACM.
• 12: T. Kempf, M. Doerper, R. Leupers, G. Ascheid, H. Meyr, T. Kogel, and B. Vanthournout. A Modular Simulation Framework for Spatial and Temporal Task Mapping onto Multi-processor SoC Platforms. Date '05, 2005.
• 13: T. Kempf, K. Karuri, S. Wallentowitz, G. Ascheid, R. Leupers, and H. Meyr. A SW Performance Estimation Framework for Early System-Level-Design Using Fine-Grained Instrumentation. In DATE '06, 2006.
• 14: M. Krause, D. Englert, O. Bringmann, and W. Rosenstiel. Combination of Instruction Set Simulation and Abstract RTOS Model Execution for Fast and Accurate Target Software Evaluation. In CODES/ISSS '08, 2008.
• 15: S. Kwon, Y. Kim, W.-C. Jeun, S. Ha, and Y. Paek. A Retargetable Parallel-Programming Framework for MPSoC. ACM Trans. Des. Autom. Electron. Syst., 13(3):1--18, 2008.
• 16: C. Lattner and V. Adve. LLVM: A Compilation Framework for Lifelong Program Analysis & Transformation. In CGO '04, 2004.
• 17: S. Mahadevan, K. Virk, and J. Madsen. ARTS: A SystemC-Based Framework for Multiprocessor Systems-on-Chip Modelling. Design Automation for Embedded Systems, 11(4):285--311, December 2007.
• 18: G. Martin. Overview of the MPSoC Design Challenge. In DAC '06, pages 274--279, 2006.
• 19: T. Meyerowitz, A. Sangiovanni-Vincentelli, M. Sauermann, and D. Langen. Source-Level Timing Annotation and Simulation for a Heterogeneous Multiprocessor. In DATE '08, March 2008.
• 20: OSCI. Open SystemC Initiative. http://www.systemc.org.
• 21: OSCI. TLM-2.0 User Manual. http://www.systemc.org/downloads/standards.
• 22: K. Popovici, X. Guerin, F. Rousseau, P. S. Paolucci, and A. A. Jerraya. Platform-Based Software Design Flow for Heterogeneous MPSoC. Trans. on Embedded Computing Sys., 7(4):1--23, 2008.
• 23: H. Posadas, J. Adamez, P. Sanchez, E. Villar, and F. Blasco. POSIX modeling in SystemC. In ASP-DAC '06, pages 485--490. IEEE Press, 2006.
• 24: M. Thompson, H. Nikolov, T. Stefanov, A. D. Pimentel, C. Erbas, S. Polstra, and E. F. Deprettere. A Framework for Rapid System-Level Exploration, Synthesis, and Programming of Multimedia MP-SoCs. In CODES+ISSS '07, pages 9--14, 2007.
• 25: W. Tibboel, V. Reyes, M. Klompstra, and D. Alders. System-Level Design Flow Based on a Functional Reference for HW and SW. In DAC '07. 44th ACM/IEEE, June 2007.
• 26: Virtio. Virtual Platforms. http://www.virtio.com.

INDEX TERMS

Primary Classification:
  I. Computing Methodologies
  I.6 SIMULATION AND MODELING
      I.6.5 Model Development
          Subjects: Modeling methodologies

General Terms:
Design

Keywords:
MPSoC, embedded, parallel programming, simulation, software, system level design, virtual platform