| Modeling synchronous systems in BIP |
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International Conference on Compilers, Architecture and Synthesis for Embedded Systems
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Proceedings of the seventh ACM international conference on Embedded software
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Grenoble, France
SESSION: Models and components
table of contents
Pages 77-86
Year of Publication: 2009
ISBN:978-1-60558-627-4
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Downloads (6 Weeks): 16, Downloads (12 Months): 16, Citation Count: 0
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ABSTRACT
We present a general approach for modeling synchronous component-based systems. These are systems of synchronous components strongly synchronized by a common action that initiates steps of each component. We propose a general model for synchronous systems. Steps are described by acyclic Petri nets equipped with data and priorities. Petri nets are used to model concurrent flow of computation. Priorities are instrumental for enforcing run-to-completion in the execution of a step. We study a class of well-triggered synchronous systems which are by construction deadlock-free and their computation within a step is confluent. For this class, the behavior of components is modeled by modal flow graphs. These are acyclic graphs representing three different types of dependency between two events p and q: strong dependency (p must follow q), weak dependency (p may follow q), conditional dependency (if both p and q occur then p must follow q). We propose a translation of Lustre into well-triggered synchronous systems. This translation is modular and exhibits not only data-flow connections between nodes but also their synchronization by using clocks.
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