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Brief announcement: performance potential of an easy-to-program PRAM-on-chip prototype versus state-of-the-art processor

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ACM Symposium on Parallel Algorithms and Architectures archive
Proceedings of the twenty-first annual symposium on Parallelism in algorithms and architectures table of contents

Calgary, AB, Canada

SESSION: Brief announcements: algorithms meets hardware table of contents

Pages 163-165

Year of Publication: 2009

ISBN:978-1-60558-606-9

Authors

George C. Caragea	University of Maryland, College Park, MD, USA
A. Beliz Saybasili	NIH, Bethesda, MD, USA
Xingzhi Wen	NVIDIA Corporation, Santa Clara, CA, USA
Uzi Vishkin	University of Maryland, College Park, MD, USA

Sponsors

SIGOPS: ACM Special Interest Group on Operating Systems
ACM: Association for Computing Machinery
SIGACT: ACM Special Interest Group on Algorithms and Computation Theory

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ACM New York, NY, USA

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ABSTRACT

We compare the Paraleap FPGA computer, a 64-processor hardware prototype of the PRAM-driven XMT architecture, with an Intel Core 2 Duo processor and show that Paraleap outperforms the Intel processor by up to 13.89x in terms of cycle counts. The comparison favors the Intel design, since the silicon area of an ASIC implementation of the 64-processor XMT design is the same as that of a single core.

REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	Software release of the explicit multi-threading (XMT) programming environment. www.umiacs.umd.edu/users/vishkin/XMT/sw-release.html,August 2008.
	2	P. Heidelberger , A. Norton , John T. Robinson, Parallel Quicksort Using Fetch-And-Add, IEEE Transactions on Computers, v.39 n.1, p.133-138, January 1990 [doi>10.1109/12.46289]
	3	M. Snir. Multi-core and parallel programming: Is the sky falling? The Computing Community Consortium Blog, www.cccblog.org/2008/11/17/multi-core-and-parallel-programming-is-the-sky-falling/, November 2008.
	4	U. Vishkin, G. C. Caragea, and B. C. Lee. Handbook of Parallel Computing: Models, Algorithms and Applications, chapter Models for Advancing PRAM and Other Algorithms into Parallel Programs for a PRAM-On-Chip Platform. CRC Press, 2007.
	5	Xingzhi Wen , Uzi Vishkin, Fpga-based prototype of a pram-on-chip processor, Proceedings of the 5th conference on Computing frontiers, May 05-07, 2008, Ischia, Italy [doi>10.1145/1366230.1366240]
	6	X. Wen and U. Vishkin. The XMT FPGA Prototype/Cycle-accurate-simulator Hybrid. In WARP08: The 3rd Workshop on Architectural Research Prototyping, Beijing, China, June 2008. In conjunction with ISCA 2008.