| Inherent limitations on disjoint-access parallel implementations of transactional memory |
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ACM Symposium on Parallel Algorithms and Architectures
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Proceedings of the twenty-first annual symposium on Parallelism in algorithms and architectures
table of contents
Calgary, AB, Canada
SESSION: Transactional memory I
table of contents
Pages 69-78
Year of Publication: 2009
ISBN:978-1-60558-606-9
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Downloads (6 Weeks): 11, Downloads (12 Months): 48, Citation Count: 0
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ABSTRACT
Transactional memory (TM) is a promising approach for designing concurrent data structures, and it is essential to develop better understanding of the formal properties that can be achieved by TM implementations. Two fundamental properties of TM implementations are disjoint-access parallelism, which is critical for their scalability, and the invisibility of read operations, which reduces memory contention. This paper proves an inherent tradeoff for implementations of transactional memories: they cannot be both disjoint-access parallel and have read-only transactions that are invisible and always terminate successfully. In fact, a lower bound of Ω(t) is proved on the number of writes needed in order to implement a read-only transaction of t items, which successfully terminates in a disjoint-access parallel TM implementation. The results assume strict serializability and thus hold under the assumption of opacity. It is shown how to extend the results to hold also for weaker consistency conditions, serializability and snapshot isolation.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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