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Brief announcement: how to speed-up fault-tolerant clock generation in VLSI systems-on-chip via pipelining

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Annual ACM Symposium on Principles of Distributed Computing archive
Proceedings of the 28th ACM symposium on Principles of distributed computing table of contents

Calgary, AB, Canada

SESSION: B1-1 table of contents

Pages 276-277

Year of Publication: 2009

ISBN:978-1-60558-396-9

Authors

Andreas Dielacher	RUAG Aerospace Austria, Vienna, Austria
Matthias Függer	Technische Universität Wien, Vienna, Austria
Ulrich Schmid	Technische Universität Wien, Vienna, Austria

Sponsors

SIGOPS: ACM Special Interest Group on Operating Systems
SIGACT: ACM Special Interest Group on Algorithms and Computation Theory
ACM: Association for Computing Machinery

Publisher

ACM New York, NY, USA

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	B. Charron-Bost, S. Dolev, J. Ebergen, and U. Schmid, editors. Fault-Tolerant Distributed Algorithms on VLSI Chips, Schloss Dagstuhl, Germany, Sept. 2008.
	2	A. Dielacher, M. Fuegger, and U. Schmid. How to Speed-up Fault-Tolerant Clock Generation in VLSI Systems-on-Chip via Pipelining, RR 15/2009, TU Wien, Inst. f. Technische Informatik, 2009.
	3	Matthias Fugger , Ulrich Schmid , Gottfried Fuchs , Gerald Kempf, Fault-Tolerant Distributed Clock Generation in VLSI Systems-on-Chip, Proceedings of the Sixth European Dependable Computing Conference, p.87-96, October 18-20, 2006 [doi>10.1109/EDCC.2006.11]
	4	Ulrich Schmid, Keynote: Distributed Algorithms and VLSI, Proceedings of the 10th International Symposium on Stabilization, Safety, and Security of Distributed Systems, November 21-23, 2008, Detroit, MI [doi>10.1007/978-3-540-89335-6_3]
	5	J. Widder and U. Schmid. The Theta-Model: Achieving synchrony without clocks. RR 49/2005, TU Wien, Inst. f. Technische Informatik, 2005. (To appear in Distributed Computing, 2009).