DRAFTS

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DRAFTS: discretized analog circuit fault simulator

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Annual ACM IEEE Design Automation Conference archive
Proceedings of the 30th international Design Automation Conference table of contents

Dallas, Texas, United States

Pages: 509 - 514

Year of Publication: 1993

ISBN:0-89791-577-1

Authors

Naveena Nagi
Abhijit Chatterjee
Jacob A. Abraham

Sponsors

EDAC : Electronic Design Automation Consortium
IEEE-CAS : Circuits & Systems
SIGDA: ACM Special Interest Group on Design Automation

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 7, Downloads (12 Months): 11, Citation Count: 10

Additional Information:

references cited by index terms collaborative colleagues

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	S. C. Fang, Y. P. Tsividis, and O. Wing. SWITCAP" A switched capacitor network analysis program. IEEE Circuits Syst. Mag., vol. 5, no. 3, pp 4-10, Sept. 1983.
	2	I. Getreu. Behavioral modeling of analog blocks using the SABER simulator. Proc. MWCAS pp. 977-980, Aug. 1989.
	3	D.K. Shirachi. Codec testing using synchronized analog and digital signals. Proc IEEE Intl. Test Con}. pp. 447- 454, 1984.
	4	M.J. Marlett and J.A. Abraham. DC-IATP: An iterative analog circuit test generation program for generating DC single pattern tests. Proc IEEE Intl. Test Conf. pp. 839- 845, 1988.
	5	M. Soma. A Design-for-Test Methodology for Active Analog Filters. Proc IEEE intl. Test Conf. pp. 183-192, 1990.
	6	N. Nagi and J.A. Abraham. Hierarchical Fault Modeling for Analog and Mixed-signal circuits. Proc IEEE VLSI Test Symp. pp. 96-101, 1992.
	7	Abhijit Chatterjee, Concurrent Error Detection in Linear Analog and Switched-Capacitor State Variable Systems Using Continuous Checksums, Proceedings of the IEEE International Test Conference on Test: Faster, Better, Sooner, p.582-591, October 26-30, 1991
	8	M.E. Van Valkenburg. Analog Filter Design. Holt, Rinehart and Winston, 1982.
	9	Seshu, Balabanian. Linear Network Analysis. John Wiley, 1959.
	10	A. Chatterjee. Checksum-based Concurrent Error Detection in Linear Analog Systems with second and higher orders. Proc IEEE VLSI Test Syrup. pp. 286-291, 1992.
	11	L. Milor and V. Visvanathan. Detection of Catastrophic faults in Analog Integrated Circuits. IEEE Trans. Computer-Aided Design pp. 114-130, 1989.
	12	J.P. Shen, W. Maly and F.J. Ferguson. Inductive fault analysis of MOS integrated circuits. IEEE Design and Test, vol. 2 pp. 13-26, Dec. 1985.
	13	L.T. Pillage, R.A. Rohrer. Asymptotic Waveform Evaluation for Timing Analysis. IEEE Trans. Computer-Aided Design, Vol 9. pp 352-366, 1990.

CITED BY 10

	Madhu K. Iyer , M. L. Bushnell, Effect of Noise on Analog Circuit Testing, Journal of Electronic Testing: Theory and Applications, v.15 n.1-2, p.11-22, August-October 1999
	Michael W. Tian , C.-J. Richard Shi, Rapid frequency-domain analog fault simulation under parameter tolerances, Proceedings of the 34th annual conference on Design automation, p.275-280, June 09-13, 1997, Anaheim, California, United States
	Naveena Nagi , Abhijit Chatterjee , Ashok Balivada , Jacob A. Abraham, Fault-based automatic test generator for linear analog circuits, Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design, p.88-91, November 07-11, 1993, Santa Clara, California, United States
	Junwei Hou , Abhijit Chatterjee, CONCERT: a concurrent transient fault simulator for nonlinear analog circuits, Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design, p.384-391, November 08-12, 1998, San Jose, California, United States
	Chen-Yang Pan , Kwang-Ting Cheng , Sandeep Gupta, A comprehensive fault macromodel for opamps, Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design, p.344-348, November 06-10, 1994, San Jose, California, United States
	Ashok Balivada , Jin Chen , Jacob A. Abraham, Analog Testing with Time Response Parameters, IEEE Design & Test, v.13 n.2, p.18-25, June 1996
	Rajesh Ramadoss , Michael L. Bushnell, Test Generation for Mixed-Signal Devices Using Signal Flow Graphs, Journal of Electronic Testing: Theory and Applications, v.14 n.3, p.189-205, June 1999
	Érika F. Cota , Luigi Carro , Marcelo Lubaszewski, A method to diagnose faults in linear analog circuits using an adaptive tester, Proceedings of the conference on Design, automation and test in Europe, p.40-es, January 1999, Munich, Germany
	Wolfgang Vermeiren , Bernd Straube , Andreas Holubek, Defect-Oriented Experiments in Fault Modelling and Fault Simulation of Microsystem Components, Proceedings of the 1996 European conference on Design and Test, p.522, March 11-14, 1996
	Jun Weir Lin , Chung Len Lee , Chau Chin Su , Jwu-E. Chen, Fault Diagnosis for Linear Analog Circuits, Journal of Electronic Testing: Theory and Applications, v.17 n.6, p.483-494, December 2001