High-level transformations for minimizing syntactic variances

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High-level transformations for minimizing syntactic variances

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Annual ACM IEEE Design Automation Conference archive
Proceedings of the 30th international Design Automation Conference table of contents

Dallas, Texas, United States

Pages: 413 - 418

Year of Publication: 1993

ISBN:0-89791-577-1

Authors

Viraphol Chaiyakul
Daniel D. Gajski
Loganath Ramachandran

Sponsors

EDAC : Electronic Design Automation Consortium
IEEE-CAS : Circuits & Systems
SIGDA: ACM Special Interest Group on Design Automation

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 1, Downloads (12 Months): 13, Citation Count: 21

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	Alfred V. Aho , Ravi Sethi , Jeffrey D. Ullman, Compilers: principles, techniques, and tools, Addison-Wesley Longman Publishing Co., Inc., Boston, MA, 1986
	2	R. Carnposarto, "Path-Based Scheduling for Synthesis," IEEE Trans. CAD, Vol.10, no.l, pp.85-93, Jan. 1991.
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	4	V. Chaiyakul and D.D. Gajski, "Assignment Decision Diagram and its Uses in High-level Synthesis," Technical Report #9~-103, University of California Irvine, October 1992.
	5	Daniel D. Gajski , Nikil D. Dutt , Allen C.-H. Wu , Steve Y.-L. Lin, High-level synthesis: introduction to chip and system design, Kluwer Academic Publishers, Norwell, MA, 1992
	6	T. Kim, J.W.S. Liu, and C.L. Liu, "A Scheduling Algorithm For Conditional Resource Sharing," Proc. ICCAD '9 I, pp.84-87, 1991.
	7	M.C. McFarlaxtd, "The Value Trace: A Data Base for Automated Digital Design," PhD. Dissertation, Department of Electrical Engineering, Carnegie-Mellon University, 1978.
	8	P.G. Paulin and J.P. Knight, "Force-Directed Scheduling for the Behavioral Synthesis of ASIC's," IEEE Trans. CAD, vol.8, no.6, pp.661-679, Jun. 1989.
	9	Chia-Jeng Tseng , Ruey-Sing Wei , Steven G. Rothweiler , Michael M. Tong , Ajoy K. Bose, Bridge: a versatile behavioral synthesis system, Proceedings of the 25th ACM/IEEE conference on Design automation, p.415-420, June 12-15, 1988, Atlantic City, New Jersey, United States
	10	R.A. Walker and R. Camposano, A Survey o} High-Level Synthesis Systems, Kluwer Academic Publishers, 1991.
	11	R.A. Walker and D.E. Thomas, "Behavioral Transformations for Algorithmic Level IC Design," IEEE Trans. CAD, vol.8, no.10, pp.1115-1128, Oct. 1989.
	12	K. Wakabayashi and T. Yoshlmura, "A Resource Sharing Control Synthesis Method for Conditional Branches," Proc. ICCAD'89, pp. 62-65, 1989.

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	Jeroen Voeten, On the fundamental limitations of transformational design, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.6 n.4, p.533-552, October 2001
	Indradeep Ghosh , Masahiro Fujita, Automatic test pattern generation for functional RTL circuits using assignment decision diagrams, Proceedings of the 37th conference on Design automation, p.43-48, June 05-09, 2000, Los Angeles, California, United States
	Youn-Long Lin, Recent developments in high-level synthesis, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.2 n.1, p.2-21, Jan. 1997
	Zheng Zhou , Wayne Burleson, Equivalence checking of datapaths based on canonical arithmetic expressions, Proceedings of the 32nd ACM/IEEE conference on Design automation, p.546-551, June 12-16, 1995, San Francisco, California, United States
	O. Peñalba , J. M. Mendías , M. C. Molina, Execution condition analysis in high level synthesis: a unified approach, Proceedings of the 13th international symposium on System synthesis, September 20-22, 2000, Madrid, Spain
	Wei-Kai Cheng , Youn-Long Lin, A transformation-based approach for storage optimization, Proceedings of the 32nd ACM/IEEE conference on Design automation, p.158-163, June 12-16, 1995, San Francisco, California, United States
	W. Baker , A. Newton, The maximal VHDL subset with a cycle-level abstraction, Proceedings of the conference on European design automation, p.470-475, September 1996, Geneva, Switzerland
	Hsiao-ping Juan , Viraphol Chaiyakul , Daniel D. Gajski, Condition graphs for high-quality behavioral synthesis, Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design, p.170-174, November 06-10, 1994, San Jose, California, United States
	O. Peñalba , J. M. Mendías , R. Hermida, A global approach to improve conditional hardware reuse in high-level synthesis, Journal of Systems Architecture: the EUROMICRO Journal, v.47 n.12, p.959-975, June 2002
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