A compaction method for full chip VLSI layouts

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A compaction method for full chip VLSI layouts

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Annual ACM IEEE Design Automation Conference archive
Proceedings of the 30th international Design Automation Conference table of contents

Dallas, Texas, United States

Pages: 407 - 412

Year of Publication: 1993

ISBN:0-89791-577-1

Authors

Joseph Dao
Nobu Matsumoto
Tsuneo Hamai
Chusei Ogawa
Shojiro Mori

Sponsors

EDAC : Electronic Design Automation Consortium
IEEE-CAS : Circuits & Systems
SIGDA: ACM Special Interest Group on Design Automation

Publisher

ACM New York, NY, USA

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Downloads (6 Weeks): 8, Downloads (12 Months): 11, Citation Count: 1

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	A. E. Dunlop, SLIM-the translation of symbolic layouts into mask data, Proceedings of the 17th conference on Design automation, p.595-602, June 23-25, 1980, Minneapolis, Minnesota, United States [doi>10.1145/800139.804592]
	2	David Marple , Michiel Smulders , Henk Hegen, An efficient compactor for 45° layout, Proceedings of the 25th ACM/IEEE conference on Design automation, p.396-402, June 12-15, 1988, Atlantic City, New Jersey, United States
	3	Mikhail Lotvin , Belinda Juran , Reeni Goldin, Amoeba: A symbolic VLSI layout system, Proceedings of the 21st conference on Design automation, p.294-300, June 25-27, 1984, Albuquerque, New Mexico, United States
	4	Chi-Yuan Lo , Ravi Varadarajan, An O(n^1.5logn) 1-d compaction algorithm, Proceedings of the 27th ACM/IEEE conference on Design automation, p.382-387, June 24-27, 1990, Orlando, Florida, United States [doi>10.1145/123186.123312]
	5	T. Ohtsuki, Layout design and verification, Elsevier Science Publishers B. V., Amsterdam, The Netherlands, 1986
	6	David Marple, A hierarchy preserving hierarchical compactor, Proceedings of the 27th ACM/IEEE conference on Design automation, p.375-381, June 24-27, 1990, Orlando, Florida, United States [doi>10.1145/123186.123311]
	7	C. S. Bamji , R. Varadarajan, Hierarchical pitchmatching compaction using minimum design, Proceedings of the 29th ACM/IEEE conference on Design automation, p.311-317, June 08-12, 1992, Anaheim, California, United States
	8	David W. Hightower, A solution to line-routing problems on the continuous plane, Proceedings of the 6th annual conference on Design Automation, p.1-24, January 1969 [doi>10.1145/800260.809014]
	9	H. Kitazawa and K. Ueda. "A look-ahead line search algorithm with high wireability for custom VLSI design". Proc. 1SCAS 1985, 1035-1038, 1985.
	10	Cadence Design Systems, Inc. "Opus IC Design System Reference Manual". 1991.