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Zero-suppressed BDDs for set manipulation in combinatorial problems
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Source Annual ACM IEEE Design Automation Conference archive
Proceedings of the 30th international Design Automation Conference table of contents
Dallas, Texas, United States
Pages: 272 - 277  
Year of Publication: 1993
ISBN:0-89791-577-1
Author
Sponsors
EDAC : Electronic Design Automation Consortium
IEEE-CAS : Circuits & Systems
SIGDA: ACM Special Interest Group on Design Automation
Publisher
ACM  New York, NY, USA
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Downloads (6 Weeks): 25,   Downloads (12 Months): 110,   Citation Count: 58
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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
S. B. Akers: "Binary Decision Diagrams", IEEE Trans. Comput., pp. 509-516, 1978
 
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M. Fujita, ~I. Fujisawa and n. Kawato: "Evaluation and Improvement of Boolean Comparison Method Based on Binary Decision Diagrams", Proc. IEEE ICCAD'88, pp. 2-5, 1988
 
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N. Takahashi, n. Ishiura and S. Yajima: "Fault Simulation for Multiple Faults Using Shared BDD Representation of Fault Sets", Proc. IEEE ICCAD'90, pp. 550-553~ 1991
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Bill Lin and Fabio Somenzi: "Minimization of Symbolic Relations", Proc. IEEE ICCAD'90, pp. 88-91, (1990).
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O. Coudert and J. C. Madre: "A New implicit Graph Based Prime and Essential Prime Computation Technique", Proc. International Symposium on Logic Synthesis and Microprocessor Architecture (ISKIT 92, Japan), pp. 125-131, 1992.
 
13
S. Minato: 'Fast Generation of Irredundant Sumof-Products Forms from Binary Decision Diagrams', Proceedings of the Synthesis and Simulation Meeting and International Interchange (SASIMI'92, Japan), 1992, pp. 64-73

CITED BY  58