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An efficient critical race-free state assignment technique for asynchronous finite state machines
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Source Annual ACM IEEE Design Automation Conference archive
Proceedings of the 30th international Design Automation Conference table of contents
Dallas, Texas, United States
Pages: 2 - 6  
Year of Publication: 1993
ISBN:0-89791-577-1
Authors
Sponsors
EDAC : Electronic Design Automation Consortium
IEEE-CAS : Circuits & Systems
SIGDA: ACM Special Interest Group on Design Automation
Publisher
ACM  New York, NY, USA
Bibliometrics
Downloads (6 Weeks): 11,   Downloads (12 Months): 29,   Citation Count: 1
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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
B. Bollobhs, Graph Theory, Chapter V, GTM 63, Springer-Verlag.
 
2
T.-A. Chu, "Synthesis of Self-Timed VLSI Circuits from Graph-Theoretic Specifications." Ph.D. Thesis, Dept. of EECS, MIT, June 1987.
 
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5
K. S. Stevens, S. V. Robinson and A. L. Davis, "The Post Office- Communication Support for Distributed Ensemble Architectures," Sixth International Conference on Distributed Computing Systems, 1986
 
6
J.H. Tracey, "Internal State Assignments for Asynchronous Sequential Machines." IEEE Trans. Electronic Computers, EC-15:551-560, Aug. 1966.
 
7
P. Vanbekbergen, et al. "A Local Optimization Technique for Synthesis of Asynchronous Control Circuits." Proc. of IWLS 91.
 
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10
D. Muller, "The general synthesis problem for asynchronous digital networks," in Conference Record of Eighth Annual Symposium on Switching and Automata Theory, 1967
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Collaborative Colleagues:
Tam Anh Chu: colleagues
Narayana Mani: colleagues
Clement K. C. Leung: colleagues