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SUPERB: Simulator utilizing parallel evaluation of resistive bridges
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ACM Transactions on Design Automation of Electronic Systems (TODAES) archive
Volume 14 ,  Issue 4  (August 2009) table of contents
Article No. 56  
Year of Publication: 2009
ISSN:1084-4309
Authors
Piet Engelke  Albert-Ludwigs-University, Freiburg, i. Br., Germany
Bernd Becker  Albert-Ludwigs-University, Freiburg, i. Br., Germany
Michel Renovell  LIRMM—UMII, Montpellier, France
Juergen Schloeffel  Mentor Graphics Development, Hamburg, Germany
Bettina Braitling  Albert-Ludwigs-University, Freiburg, i. Br., Germany
Ilia Polian  Albert-Ludwigs-University, Freiburg, i. Br., Germany
Publisher
ACM  New York, NY, USA
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ABSTRACT

A high-performance resistive bridging fault simulator SUPERB (Simulator Utilizing Parallel Evaluation of Resistive Bridges) is proposed. It is based on fault sectioning in combination with parallel-pattern or parallel-fault multiple-stuck-at simulation. It outperforms a conventional interval-based resistive bridging fault simulator by three orders of magnitude while delivering identical results. Further competing tools are outperformed by several orders of magnitude. Industrial-size circuits, including a multi-million-gates design, could be simulated with runtimes within an order of magnitude of the runtimes for pattern-parallel stuck-at fault simulation.


REFERENCES

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