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AnySP: anytime anywhere anyway signal processing
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International Symposium on Computer Architecture archive
Proceedings of the 36th annual international symposium on Computer architecture table of contents
Austin, TX, USA
SESSION: Multimedia and mobile table of contents
Pages 128-139  
Year of Publication: 2009
ISBN:978-1-60558-526-0
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Authors
Mark Woh  University of Michigan, Ann Arbor, USA
Sangwon Seo  University of Michigan, Ann Arbor, USA
Scott Mahlke  University of Michigan, Ann Arbor, USA
Trevor Mudge  University of Michigan, Ann Arbor, USA
Chaitali Chakrabarti  Arizona State University, Tempe, AZ, USA
Krisztian Flautner  ARM, Ltd.
Sponsors
SIGARCH: ACM Special Interest Group on Computer Architecture
ACM: Association for Computing Machinery
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ACM  New York, NY, USA
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ABSTRACT

In the past decade, the proliferation of mobile devices has increased at a spectacular rate. There are now more than 3.3 billion active cell phones in the world-a device that we now all depend on in our daily lives. The current generation of devices employs a combination of general-purpose processors, digital signal processors, and hardwired accelerators to provide giga-operations-per-second performance on milliWatt power budgets. Such heterogeneous organizations are inefficient to build and maintain, as well as waste silicon area and power. Looking forward to the next generation of mobile computing, computation requirements will increase by one to three orders of magnitude due to higher data rates, increased complexity algorithms, and greater computation diversity but the power requirements will be just as stringent. Scaling of existing approaches will not suffice instead the inherent computational efficiency, programmability, and adaptability of the hardware must change. To overcome these challenges, this paper proposes an example architecture, referred to as AnySP, for the next generation mobile signal processing. AnySP uses a co-design approach where the next generation wireless signal processing and high-definition video algorithms are analyzed to create a domain specific programmable architecture. At the heart of AnySP is a configurable single-instruction multiple-data datapath that is capable of processing wide vectors or multiple narrow vectors simultaneously. In addition, deeper computation subgraphs can be pipelined across the single-instruction multiple-data lanes. These three operating modes provide high throughput across varying application types. Results show that AnySP is capable of sustaining 4G wireless processing and high-definition video throughput rates, and will approach the 1000 Mops/mW efficiency barrier when scaled to 45nm.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

1
 
2
ARM Ltd. The ARM Architecture Version 6 (ARMv6), 2002. White Paper.
 
3
R. Baines and D. Pulley. The PICOArray and reconfigurable baseband processing for wireless basestations. In Software Defined Radio, February 2004.
4
5
 
6
 
7
K. Fan et al. Systematic register bypass customization for application-specific processors. Proceedings. IEEE International Conference on Application-Specific Systems, Architectures, and Processors, 2003, pages 64--74, June 2003.
 
8
J. Glossner, E. Hokenek, and M. Moudgill. The sandbridge sandblaster communications processor. In 3rd Workshop on Application Specific Processors, pages 53--58, Sept. 2004.
 
9
 
10
R. Golshan and B. Haroun. A novel reduced swing CMOS bus interface circuit for high speed low power VLSI systems. volume 4, pages 351--354 vol.4, May-2 Jun 1994.
 
11
 
12
Nanoscale Integration and Modeling Group. Predictive Technology Model. http://www.eas.asu.edu/ ptm/.
 
13
S. Knowles. The SoC Future is Soft. IEE Cambridge Branch Seminar 2005, Dec. 2005. http://www.iee-cambridge.org.uk/arc/seminar05/slides/SimonKnowles.pdf.
 
14
15
 
16
T. A. Lin, T. M. Liu, and C. Y. Lee. A low-power H.264/AVC decoder. International Symposium on VLSI Design, Automation and Test, 2005., pages 283--286, April 2005.
17
 
18
Y. Lin, S. Mahlke, T. Mudge, C. Chakrabarti, A. Reid, and K. Flautner. Design and implementation of Turbo decoders for software defined radio. IEEE Workshop on Signal Processing Systems Design and Implementation, 2006. SIPS '06., pages 22--27, Oct. 2006.
 
19
A. Lodi et al. Xisystem: A XiRisc-based SoC with reconfigurable IO module. IEEE Journal of Solid-State Circuits, 41(1):85--96, Jan. 2006.
 
20
B.F. Mei et al. ADRES: An architecture with tightly coupled vliw processor and coarse-grained reconfigurable matrix. 13th International Conference on Field-Programmable Logic and Applications, 2003. FPL 2003, pages 61--70, Sept. 2003.
 
21
S. Park et al. Register file power reduction using bypass sensitive compiler. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 27(6):1155--1159, June 2008.
22
23
 
24
D. Pham et al. The design and implementation of a first generation CELL processor. In IEEE Intl. Solid State Circuits Symposium, February 2005.
 
25
P. Raghavan et al. A customized cross-bar for data-shuffling in domain-specific simd processors. In ARCS, volume 4415 of Lecture Notes in Computer Science, pages 57--68. Springer, 2007.
 
26
 
27
 
28
International Telecommunications Union M.1645 Recommendation. Framework and overall objectives of the future development of IMT-2000 and systems beyond IMT-2000". http://www.ieee802.org/secmail/pdf00204.pdf.
29
 
30
S. Seo, T. Mudge, Y. Zhu, and C. Chakrabarti. Design and analysis of LDPC decoders for software defined radio. IEEE Workshop on Signal Processing Systems, 2007, pages 210--215, Oct. 2007.
 
31
H. Taoka, K. Higuchi, and M. Sawahashi. Field experiments on real-time 1-Gbps high-speed packet transmission in MIMO-OFDM broadband packet radio access. IEEE 63rd Vehicular Technology Conference, 2006. VTC 2006-Spring., 4:1812--1816, May 2006.
 
32
 
33
M. Woh et al. The next generation challenge for software defined radio. In Proc. 7th Intl. Conference on Systems, Architectures, Modelling, and Simulation, pages 343--354, Jul. 2007.
 
34

Collaborative Colleagues:
Mark Woh: colleagues
Sangwon Seo: colleagues
Scott Mahlke: colleagues
Trevor Mudge: colleagues
Chaitali Chakrabarti: colleagues
Krisztian Flautner: colleagues