Investigating transactional memory performance on ccNUMA machines

ABSTRACT

Most Software Transactional Memory (STM) research has focused on multi-core processors and small SMP machines; limited research has been aimed at the clusters, leaving the area of big SMP machines unexplored. Big SMP machine usually use Non-Uniform Memory Access (NUMA) to unburden the overloading between CPUs and the memory. In this paper, we evaluate several STM implementations on big SMP machine with cache coherent NUMA (ccNUMA) architecture. We found the remote memory access latency is the key factor influencing the STM performance. We also analyze the different design choices of STM. Finally, we conclude a specific design choice to achieve high performance in this domain.

REFERENCES

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INDEX TERMS

Primary Classification:
  D. Software
  D.1 PROGRAMMING TECHNIQUES
      D.1.3 Concurrent Programming
          Subjects: Parallel programming

General Terms:
Performance

Keywords:
ccNUMA, transactional memory