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An efficient placement and routing technique for fault-tolerant distributed embedded computing
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ACM Transactions on Embedded Computing Systems (TECS) archive
Volume 8 ,  Issue 4  (July 2009) table of contents
Article No. 28  
Year of Publication: 2009
ISSN:1539-9087
Authors
Roozbeh Jafari  University of Texas at Dallas, Richardson, TX
Hassan Ghasemzadeh  University of Texas at Dallas, Richardson, TX
Foad Dabiri  University of California, Los Angeles, CA
Ani Nahapetian  University of California, Los Angeles, CA
Majid Sarrafzadeh  University of California, Los Angeles, CA
Publisher
ACM  New York, NY, USA
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ABSTRACT

This article presents an efficient technique for placement and routing of sensors/actuators and processing units in a grid network. The driver application that we present is a medical jacket, which requires an extremely high level of robustness and fault tolerance. The power consumption of such jacket is another key technological constraint. Our proposed interconnection network is a mesh of wires. A jacket made of fabric and wires would be susceptible to accidental damage via tears. By modeling the tears, we evaluate the probability of having failures on every segment of wires in our mesh interconnection network. Then, we study two problems of placement and routing in the sensor networks such that the fault tolerance is maximized while the power consumption is minimized. We develop efficient integer linear programming (ILP) formulations to address these problems and perform both placement and routing, simultaneously. This ensures that the solution is a lower bound for both problems. We evaluate the effectiveness of our proposed techniques on a variety of benchmarks.


REFERENCES

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1
 
2
Bona, M. 1994. Textile Quality. Texilia, Manchester, UK.
 
3
Burstein, M. and Pelavin, R. 1983. Hierarchical wire routing. IEEE Trans. Comput. Aid. Des. Integr. Circ. Syst. 2, 4, 223--234.
4
 
5
 
6
Dunlop, A. E. and Kernighan, B. W. 1985. A Procedure for Placement of Standard Cell VLSI Circuits. IEEE Trans. Comput.-Aid. Des. Integr. Circ. 4, 1, 92--98.
 
7
Hall, K. 1970. An r-dimensional quadratic placement algorithm. Manage. Sci. 17, 3, 219--229.
 
8
9
 
10
Kleinhans, J. M., Sigl, G., Johannes, F. M., and Antreich, K. J. 1991. Gordon: Vlsi Placement by quadratic programming and slicing optimization. IEEE Trans. Comput.-Aid. Des. Integr. Circ. 10, 3, 365.
 
11
Lee, J. 1961. An algorithm for path connection and its application. IEEE Trans. Electron. Comput. EC-10, 3, 346--365.
 
12
Meoli, D. and May-Plumlee, T. 2002. Interactive electronic textile development: A review of technologies. J. Textile Apparel Tech. Manage. 2, 2, 1--12.
 
13
N. Lek, R. T. and Kang, S. 1992. A new global router using zero-one integer linear programming techniques for sea-of-gates and custom logic arrays. IEEE Trans. Comput.-Aid Des. Integr. Circ. Syst. 11, 12, 1479--1494.
 
14
 
15
Primentas, A. 2001. Puncture and tear of woven fabrics. J. Textile Apparel Tech. Manage. 1, 4, 1--8.
 
16
Quinn, N. and Breuer, M. 1979. A force directed component placement procedure for printed circuit boards. IEEE Trans. Circ. Syst. 26, 6, 377--388.
 
17
 
18
Shahookar, K. and Mazumder, P. 1990. A genetic approach to standard cell placement using meta-genetic parameter optimization. IEEE Trans. Comput.-Aid. Des. Integr. Circ. 9, 5, 500--511.
 
19
 
20
 
21
 
22
Sun, W. J. and Sechen, C. 1995. Efficient and effective placement for very large circuits. IEEE Trans. Comput.-Aid. Des. Integr. Circ. 14, 3, 349--359.
 
23
 
24
Witkowska, B. and Frydrych, I. 2004. A comparative analysis of tear strength methods. Fibres and Textiles in Eastern Europe 12, 2, 42--47.

Collaborative Colleagues:
Roozbeh Jafari: colleagues
Hassan Ghasemzadeh: colleagues
Foad Dabiri: colleagues
Ani Nahapetian: colleagues
Majid Sarrafzadeh: colleagues