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Towards a holistic approach to auto-parallelization: integrating profile-driven parallelism detection and machine-learning based mapping
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Conference on Programming Language Design and Implementation archive
Proceedings of the 2009 ACM SIGPLAN conference on Programming language design and implementation table of contents
Dublin, Ireland
SESSION: Transactions, locks, and parallelism table of contents
Pages 177-187  
Year of Publication: 2009
ISBN:978-1-60558-392-1
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Authors
Georgios Tournavitis  University of Edinburgh, Edinburgh, United Kingdom
Zheng Wang  University of Edinburgh, Edinburgh, United Kingdom
Björn Franke  University of Edinburgh, Edinburgh, United Kingdom
Michael F.P. O'Boyle  University of Edinburgh, Edinburgh, United Kingdom
Sponsors
SIGPLAN: ACM Special Interest Group on Programming Languages
ACM: Association for Computing Machinery
Publisher
ACM  New York, NY, USA
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ABSTRACT

Compiler-based auto-parallelization is a much studied area, yet has still not found wide-spread application. This is largely due to the poor exploitation of application parallelism, subsequently resulting in performance levels far below those which a skilled expert programmer could achieve. We have identified two weaknesses in traditional parallelizing compilers and propose a novel, integrated approach, resulting in significant performance improvements of the generated parallel code. Using profile-driven parallelism detection we overcome the limitations of static analysis, enabling us to identify more application parallelism and only rely on the user for final approval. In addition, we replace the traditional target-specific and inflexible mapping heuristics with a machine-learning based prediction mechanism, resulting in better mapping decisions while providing more scope for adaptation to different target architectures. We have evaluated our parallelization strategy against the NAS and SPEC OMP benchmarks and two different multi-core platforms (dual quad-core Intel Xeon SMP and dual-socket QS20 Cell blade). We demonstrate that our approach not only yields significant improvements when compared with state-of-the-art parallelizing compilers, but comes close to and sometimes exceeds the performance of manually parallelized codes. On average, our methodology achieves 96% of the performance of the hand-tuned OpenMP NAS and SPEC parallel benchmarks on the Intel Xeon platform and gains a significant speedup for the IBM Cell platform, demonstrating the potential of profile-guided and machine-learning based parallelization for complex multi-core platforms.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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Collaborative Colleagues:
Georgios Tournavitis: colleagues
Zheng Wang: colleagues
Björn Franke: colleagues
Michael F.P. O'Boyle: colleagues