Scalable support for multithreaded applications on dynamic binary instrumentation systems

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Scalable support for multithreaded applications on dynamic binary instrumentation systems

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International Symposium on Memory Management archive
Proceedings of the 2009 international symposium on Memory management table of contents

Dublin, Ireland

SESSION: Paper session 1 table of contents

Pages 20-29

Year of Publication: 2009

ISBN:978-1-60558-347-1

Authors

Kim Hazelwood	University of Virginia, Charlottesville, VA, USA
Greg Lueck	Intel Corporation, Hudson, MA, USA
Robert Cohn	Intel Corporation, Hudson, MA, USA

Sponsors

SIGPLAN: ACM Special Interest Group on Programming Languages
ACM: Association for Computing Machinery

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ACM New York, NY, USA

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ABSTRACT

Dynamic binary instrumentation systems are used to inject or modify arbitrary instructions in existing binary applications; several such systems have been developed over the past decade. Much of the literature describing the internal architecture and performance of these systems has focused on executing single-threaded guest applications. In this paper, we discuss the specific design decisions necessary for supporting large, multithreaded applications on JIT-based dynamic instrumentation systems. While implementing a working solution for multithreading is straightforward, providing a system that scales in terms of memory and performance is much more intricate. We highlight the design decisions in the latest version of the Pin dynamic instrumentation system, including the just-in-time compiler, the emulator, and the code cache. The overall design strives to provide scalable performance and memory footprints on modern applications.

REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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