Power consumption and reduction in a real, commercial multimedia core

ABSTRACT

Peak power and total energy consumption are key factors in the design of embedded microprocessors. Many techniques have been shown to provide great reductions in peak power and/or energy consumption. Unfortunately, several unrealistic assumptions are often made in research studies, especially in regards to multimedia processors. This paper focuses on power reduction in real commercial processors, and how that differs from more abstract research studies.

We study the power consumption of the TriMedia TM3270, an embedded, synthesized microprocessor used in several commercial products, on both and simulation tools. We find that increased functional unit utilization and memory access density causes significant differences in power consumption between compiler-optimized and carefully hand-optimized code. We also apply some simple techniques for power savings with no performance degradation, though the focus of the paper is the evaluation of such techniques, not the techniques themselves.

REFERENCES

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INDEX TERMS

Primary Classification:
  C. Computer Systems Organization
  C.1 PROCESSOR ARCHITECTURES
      C.1.2 Multiple Data Stream Architectures (Multiprocessors)
          Subjects: Single-instruction-stream, multiple-data-stream processors (SIMD)

General Terms:
Measurement, Performance

Keywords:
cache memory, compiler optimization, embedded processor, energy, multimedia, power, tm3270