ACM Home Page
Please provide us with feedback. Feedback
A study on impact of aggressor de-rating in the context of multiple crosstalk effects in circuits
Full text PdfPdf (770 KB)
Source
Great Lakes Symposium on VLSI archive
Proceedings of the 19th ACM Great Lakes symposium on VLSI table of contents
Boston Area, MA, USA
SESSION: Testing table of contents
Pages 529-534  
Year of Publication: 2009
ISBN:978-1-60558-522-2
Authors
Alodeep Sanyal  University Of Massachusetts Amherst, Amherst, MA, USA
Abhisek Pan  University Of Massachusetts Amherst, Amherst, MA, USA
Sandip Kundu  University Of Massachusetts Amherst, Amherst, MA, USA
Sponsors
ACM: Association for Computing Machinery
SIGDA: ACM Special Interest Group on Design Automation
Publisher
ACM  New York, NY, USA
Bibliometrics
Downloads (6 Weeks): 8,   Downloads (12 Months): 22,   Citation Count: 0
Additional Information:

abstract   references   index terms   collaborative colleagues  

Tools and Actions: Request Permissions Request Permissions    Review this Article  
DOI Bookmark: Use this link to bookmark this Article: http://doi.acm.org/10.1145/1531542.1531661
What is a DOI?

ABSTRACT

Capacitive crosstalk induced signal integrity effects have been studied for over a decade. A typical victim net has multiple aggressors. In worst-case analysis of crosstalk effects, it is customary to assume that (i) all aggressors can switch at the same time and (ii) aggressors themselves are not subject to other crosstalk effects. Further refinements of the worst-case analysis consider (a) Boolean filtering of the aggressors to take logical relationship among them into account and (b) timing filtering to exclude aggressors that cannot switch in the same timing window where the victim node is switching. However, even further refinement is possible by relaxing supposition (ii) above that assumes that aggressors are not subject to noise themselves. In this paper, we present a simulation study that considers multiple crosstalk effects where the aggressors of one net can be victim themselves with signals switching in their neighborhood. The simulations are performed on an innovative compact model that permits circular reasoning in an event-driven, non-zero gate delay, and dynamic simulation framework. Results indicate that when crosstalk on aggressors is also considered while processing crosstalk on a victim, the impact is often mitigated substantially.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
 
2
A.K. Goel, and Y.R. Huang. "Modeling of crosstalk among the GaAs VLSI connections," IEEE Proceedings, Part G, Vol. 136, pp. 361--368, 1989
 
3
 
4
A. Rubio, and R. Anglada. "An approach to crosstalk effect analysis and avoidance techniques in digital CMOS VLSI circuits," Int'l Journal of Electronics, Vol. 65, No. 1, pp. 3--17, 1988
 
5
 
6
D.S. Gao, A.T. Yang, and S.M. Kang. "Modeling and simulation of interconnection delays and crosstalk in high-speed integrated circuits," IEEE Transactions on Circuits and Systems, Vol. 37, pp. 1--9, 1990
7
 
8
F. Moll, and A. Rubio. "Spurious signals in digital CMOS VLSI circuits: a propagation analysis," IEEE Transactions on Circuits and Systems-II: Analog and Digital Signal Processing, Vol. 39, No. 10, pp. 749--752, 1992
 
9
 
10
 
11
M.L. Bushnell, and V.D. Agrawal. "Essentials of Electronic Testing For Digital, Memeory & Mixed-Signal VLSI Circuits," Kluwer Academic Publishers, Norwell, MA, 2000
 
12
 
13
 
14
 
15
S. Voranantakul, and J.L. Prince. "Crosstalk analysis for high-speed pulse propagation in lossy electrical interconnects," IEEE Transactions on Components, Hybrids, and Manufacturing Technology, Vol. 16, No. 1, pp. 127--136, 1993
 
16

Collaborative Colleagues:
Alodeep Sanyal: colleagues
Abhisek Pan: colleagues
Sandip Kundu: colleagues