| State persistence: a property for guiding test generation |
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Great Lakes Symposium on VLSI
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Proceedings of the 19th ACM Great Lakes symposium on VLSI
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Boston Area, MA, USA
SESSION: Testing
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Pages: 523-528
Year of Publication: 2009
ISBN:978-1-60558-522-2
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ABSTRACT
We study a property of circuit states referred to as persistence. The persistence pi(s) of a state s is the number of next-state variables whose values are specified (0 or 1) when a fully-unspecified primary input vector is applied to the circuit in state s. When a next-state variable Yi is specified under a fully-unspecified primary input vector, there are faults in the input cone of Yi that cannot be detected on Yi. We demonstrate through experimental results that when lower-persistence states are used as scan-in states, the resulting tests detect larger numbers of faults. Low-persistence states are thus preferable as scan-in states during test generation. We also discuss the computation of low-persistence states.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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