Deflecting crosstalk by routing reconsideration through refined signal correlation estimation

ABSTRACT

Crosstalk between interconnects has become one of the major factors that tamper with VLSI signal integrity as device feature size scales down to UDSM and nanometer level. Traditional techniques for crosstalk reduction focus on reducing the coupling capacitance between interconnect nets to maximize the crosstalk slack among the nets. Although effective in reducing the worst-case crosstalk, such a strategy is incapable of minimizing the average run-time crosstalk which is equivalently critical for the timing and functional correctness of nanoscale VLSI. The minimization of both worst-case and average crosstalk necessitates the consideration of signal correlation information determined by circuit logic during the layout optimization stage. In this paper, a post-global routing technique is proposed to reduce the run-time crosstalk risk without violating the worst-case crosstalk bound specified by traditional techniques. A measure is proposed to accurately capture the signal correlation and model the run-time behavior of net pairs. Adjustment in the routing track assignment is performed under the guidance of run-time information to reduce the chance of neighboring nets having crosstalk-generating signal transitions. Meanwhile, the coupling length of each net is still controlled to within a specific bound for the maximization of the minimal crosstalk slack.

Experimental results show that, compared to the conventional approaches, the proposed technique achieves significant reduction in average crosstalk without exacerbating the minimal crosstalk slack of the circuit.

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INDEX TERMS

Primary Classification:
  J. Computer Applications
  J.6 COMPUTER-AIDED ENGINEERING
      Subjects: Computer-aided design (CAD)

General Terms:
Algorithms, Reliability

Keywords:
crosstalk, routing, signal correlation