| A taylor series methodology for analyzing the effects of process variation on circuit operation |
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Great Lakes Symposium on VLSI
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Proceedings of the 19th ACM Great Lakes symposium on VLSI
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Boston Area, MA, USA
SESSION: Physical level optimization
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Pages: 203-208
Year of Publication: 2009
ISBN:978-1-60558-522-2
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Downloads (6 Weeks): 9, Downloads (12 Months): 62, Citation Count: 0
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ABSTRACT
We present a methodology that can analyze the effect of process variations without requiring the repeated simulations of a Monte Carlo type method. A graph theoretic procedure is described to obtain an explicit differential equation from the differential algebraic equations modeling a circuit netlist. With this explicit form, Taylor series polynomials are used to represent the system variables. The non-constant process parameters are represented as intervals, the Taylor series expansion is used to perform interval computations to generate bounds for the system variables. Methods are discussed to prevent blow-up of intervals during the time marching method.
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