| Using soft-edge flip-flops to compensate NBTI-induced delay degradation |
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Great Lakes Symposium on VLSI
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Proceedings of the 19th ACM Great Lakes symposium on VLSI
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Boston Area, MA, USA
POSTER SESSION: Poster session 1
table of contents
Pages 169-172
Year of Publication: 2009
ISBN:978-1-60558-522-2
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Downloads (6 Weeks): 14, Downloads (12 Months): 40, Citation Count: 0
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ABSTRACT
We present a low-overhead solution to tackle the delay increase caused by Negative Bias Temperature Instability (NBTI), which has emerged as the most critical reliability issue in sub-90nm technology nodes. The proposed solution consists of using special type of registers, called soft-edge flip-flops (SEFFs), which allow to compensate for the delay increase by introducing a transparency window. SEFFs are an effective alternative to existing solutions such as threshold, supply, or body-bias voltage modulation, since they provide minimum area and power overhead, and can seamlessly replace regular FFs. Results show that delay degradation up-to 60ps after 10 years of aging can be accounted for with a very small (less than 1%) area penalty.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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[doi> 10.1145/1278480.1278573]
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