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Memory-level parallelism aware fetch policies for simultaneous multithreading processors
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ACM Transactions on Architecture and Code Optimization (TACO) archive
Volume 6 ,  Issue 1  (March 2009) table of contents
Article No. 3  
Year of Publication: 2009
ISSN:1544-3566
Authors
Stijn Eyerman  Ghent University, Gent, Belgium
Lieven Eeckhout  Ghent University, Gent, Belgium
Publisher
ACM  New York, NY, USA
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ABSTRACT

A thread executing on a simultaneous multithreading (SMT) processor that experiences a long-latency load will eventually stall while holding execution resources. Existing long-latency load aware SMT fetch policies limit the amount of resources allocated by a stalled thread by identifying long-latency loads and preventing the thread from fetching more instructions—and in some implementations, instructions beyond the long-latency load are flushed to release allocated resources.

This article proposes an SMT fetch policy that takes into account the available memory-level parallelism (MLP) in a thread. The key idea proposed in this article is that in case of an isolated long-latency load (i.e., there is no MLP), the thread should be prevented from allocating additional resources. However, in case multiple independent long-latency loads overlap (i.e., there is MLP), the thread should allocate as many resources as needed in order to fully expose the available MLP. MLP-aware fetch policies achieve better performance for MLP-intensive threads on SMT processors, leading to higher overall system throughput and shorter average turnaround time than previously proposed fetch policies.


REFERENCES

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Collaborative Colleagues:
Stijn Eyerman: colleagues
Lieven Eeckhout: colleagues