Dependable VLSI: device, design and architecture

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Dependable VLSI: device, design and architecture: how should they cooperate?

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Asia and South Pacific Design Automation Conference archive
Proceedings of the 2009 Asia and South Pacific Design Automation Conference table of contents

Yokohama, Japan

SESSION: Dependable VLSI: device, design and architecture---how should they cooperate? table of contents

Pages 859-860

Year of Publication: 2009

ISBN:978-1-4244-2748-2

Authors

Shuichi Sakai	The University of Tokyo, Bunkyo-ku, Tokyo, Japan
Hidetoshi Onodera	Kyoto University, Kyoto, Japan
Hiroto Yasuura	Kyusyu University, Nishi-ku Fukuoka, Japan
James C. Hoe	Carnegie Mellon University

Sponsors

: IEEE Circuits and Systems Society
SIGDA: ACM Special Interest Group on Design Automation
IEICE ESS : Institute of Electronics, Information and Communication Engineers - Engineering Sciences Society
IPSJ SIGSLDM : Information Processing Society of Japan - SIG System LSI Design Methodology

Publisher

IEEE Press Piscataway, NJ, USA

Bibliometrics

Downloads (6 Weeks): 3, Downloads (12 Months): 16, Citation Count: 0

Additional Information:

abstract references collaborative colleagues

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ABSTRACT

VLSI dependability is one of the most significant issues in the modern world. Here the panelists will discuss the key technologies for it as well as the cost optimization among device, design and architecture.

REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	IFIP WG10.4, "Dependable Computing and Fault Tolerance," http://www.dependability.org/wg10.4/
	2	Algirdas Avizienis , Jean-Claude Laprie , Brian Randell , Carl Landwehr, Basic Concepts and Taxonomy of Dependable and Secure Computing, IEEE Transactions on Dependable and Secure Computing, v.1 n.1, p.11-33, January 2004 [doi>10.1109/TDSC.2004.2]
	3	S. Sakai, M. Goshima and H. Irie, "Ultra Dependable Processor," IEICE Trans. Electron., Vol. E91--C, No. 9, pp. 1386--1393, 2008.
	4	Japan Science and Technology Agency, "Fundamental technologies for dependable VLSI system", http://www.dvlsi.jst.go.jp/english/index.html

Collaborative Colleagues:

Shuichi Sakai: colleagues

Hidetoshi Onodera: colleagues

Hiroto Yasuura: colleagues

James C. Hoe: colleagues

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