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Design for burn-in test: a technique for burn-in thermal stability under die-to-die parameter variations
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Asia and South Pacific Design Automation Conference archive
Proceedings of the 2009 Asia and South Pacific Design Automation Conference table of contents
Yokohama, Japan
SESSION: Verification, test, and yield table of contents
Pages 787-792  
Year of Publication: 2009
ISBN:978-1-4244-2748-2
Authors
Mesut Meterelliyoz  Purdue University, West Lafayette, IN
Kaushik Roy  Purdue University, West Lafayette, IN
Sponsors
: IEEE Circuits and Systems Society
SIGDA: ACM Special Interest Group on Design Automation
IEICE ESS : Institute of Electronics, Information and Communication Engineers - Engineering Sciences Society
IPSJ SIGSLDM : Information Processing Society of Japan - SIG System LSI Design Methodology
Publisher
IEEE Press  Piscataway, NJ, USA
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Downloads (6 Weeks): 8,   Downloads (12 Months): 40,   Citation Count: 0
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ABSTRACT

Strong temperature dependence of leakage has been a major problem during burn-in test where increased voltages and temperatures are applied to weed out defective parts. Moreover, process variations may result in different temperature profiles in different dies during burn-in. This paper proposes an adaptive design-for-burn-in technique that stabilizes the junction temperature by controlling the leakage power using sleep (supply-gating) transistors for a wide range of ambient temperatures, process variations, thermal resistances and supply voltages.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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Collaborative Colleagues:
Mesut Meterelliyoz: colleagues
Kaushik Roy: colleagues