| Compiler-managed register file protection for energy-efficient soft error reduction |
| Full text |
Pdf
(394 KB)
|
Source
|
Asia and South Pacific Design Automation Conference
archive
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
table of contents
Yokohama, Japan
SESSION: Compilation techniques for embedded systems
table of contents
Pages 618-623
Year of Publication: 2009
ISBN:978-1-4244-2748-2
|
|
Authors
|
|
| Sponsors |
|
| Publisher |
IEEE Press
Piscataway, NJ, USA
|
| Bibliometrics |
Downloads (6 Weeks): 12, Downloads (12 Months): 33, Citation Count: 1
|
|
|
ABSTRACT
For embedded systems where neither energy nor reliability can be easily sacrificed, we present an energy efficient soft error protection scheme for register files (RF). Unlike previous approaches, our method explicitly optimizes for energy efficiency and exploits the fundamental tradeoff between reliability and energy. While even simple compiler-managed RF protection scheme is more energy efficient than hardware schemes, this work formulates and solves further compiler optimization problems to significantly enhance the energy efficiency of RF protection schemes by an additional 24%.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
| |
1
|
|
| |
2
|
S. Park, A. Shrivastava, N. Dutt, A. Nicolau, Y. Paek, and E. Earlie, "Bypass aware instruction scheduling for register file power reduction," pp. 173--181, 2006.
|
 |
3
|
Jason A. Blome , Shantanu Gupta , Shuguang Feng , Scott Mahlke, Cost-efficient soft error protection for embedded microprocessors, Proceedings of the 2006 international conference on Compilers, architecture and synthesis for embedded systems, October 22-25, 2006, Seoul, Korea
[doi> 10.1145/1176760.1176811]
|
| |
4
|
Timothy J. Slegel , Robert M. Averill III , Mark A. Check , Bruce C. Giamei , Barry W. Krumm , Christopher A. Krygowski , Wen H. Li , John S. Liptay , John D. MacDougall , Thomas J. McPherson , Jennifer A. Navarro , Eric M. Schwarz , Kevin Shum , Charles F. Webb, IBM's S/390 G5 Microprocessor Design, IEEE Micro, v.19 n.2, p.12-23, March 1999
[doi> 10.1109/40.755464]
|
| |
5
|
R. Phelan, "Addressing soft errors in ARM core-based SoC," 2003, ARM white paper.
|
 |
6
|
|
| |
7
|
|
| |
8
|
|
| |
9
|
M. Kandala, W. Zhang, and L. Yang, "An area-efficient approach to improving register file reliability against transient errors," in Int'l Symp. on Embedded Computing, 2007.
|
| |
10
|
|
| |
11
|
|
| |
12
|
M. R. Guthaus , J. S. Ringenberg , D. Ernst , T. M. Austin , T. Mudge , R. B. Brown, MiBench: A free, commercially representative embedded benchmark suite, Proceedings of the Workload Characterization, 2001. WWC-4. 2001 IEEE International Workshop, p.3-14, December 02-02, 2001
[doi> 10.1109/WWC.2001.15]
|
| |
13
|
T. Austin, "SimpleScalar LLC."
|
 |
14
|
|
 |
15
|
|
|