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A software solution for dynamic stack management on scratch pad memory
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Asia and South Pacific Design Automation Conference archive
Proceedings of the 2009 Asia and South Pacific Design Automation Conference table of contents
Yokohama, Japan
SESSION: Compilation techniques for embedded systems table of contents
Pages 612-617  
Year of Publication: 2009
ISBN:978-1-4244-2748-2
Authors
Arun Kannan  Arizona State University, Tempe, AZ
Aviral Shrivastava  Arizona State University, Tempe, AZ
Amit Pabalkar  Arizona State University, Tempe, AZ
Jong-eun Lee  Arizona State University, Tempe, AZ
Sponsors
: IEEE Circuits and Systems Society
SIGDA: ACM Special Interest Group on Design Automation
IEICE ESS : Institute of Electronics, Information and Communication Engineers - Engineering Sciences Society
IPSJ SIGSLDM : Information Processing Society of Japan - SIG System LSI Design Methodology
Publisher
IEEE Press  Piscataway, NJ, USA
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ABSTRACT

In an effort to make processors more power efficient scratch pad memory (SPM) have been proposed instead of caches, which can consume majority of processor power. However, application mapping on SPMs remain a challenge. We propose a dynamic SPM management scheme for program stack data for processor power reduction. As opposed to previous efforts, our solution does not mandate any hardware changes, does not need profile information, and SPM size at compile-time, and seamlessly integrates support for recursive functions. Our technique manages stack frames on SPM using a scratch pad memory manager (SPMM), integrated into the application binary by the compiler. Our experiments on benchmarks from MiBench [15] show average energy savings of 37% along with a performance improvement of 18%


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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ARM, "ARM926EJ-S Technical Reference Manual," http://infocenter.arm.com/help/topic/com.arm.doc.ddi0198d/DDI0198_926_TRM.pdf.
 
13
P. Shivakumar and N. P. Jouppi, CACTI 3.2, http://www.hpl.hp.com/research/cacti/.
 
14
Samsung K4X51163PC Mobile DDR Synchronous DRAM, http://www.samsung.com/products/semiconductor/MobileSDRAM/2005.
 
15
MiBench Suite, http://www.eecs.umich.edu/mibench/.
 
16
T. Austin, SimpleScalar LLC, http://www.simplescalar.com/.
 
17
Intel IXP1200 Family of Network Processors - Product line, http://www.intel.com/design/network/products/npfamily/ixp1200.htm
 
18
The Cell project at IBM Research, http://www.research.ibm.com/cell/.
Collaborative Colleagues:
Arun Kannan: colleagues
Aviral Shrivastava: colleagues
Amit Pabalkar: colleagues
Jong-eun Lee: colleagues