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ABSTRACT
This paper presents a new method using multi-objective optimization algorithm to automatically find the best solution from a topology library of analog circuits. Firstly this method abstracts the Pareto-front of each topology in the library by SPICE simulation. Then, the Pareto-front of the topology library is abstracted from the Pareto-fronts of topologies in the library followed by the theorem we proved. The best solution which is defined as the nearest point to specification on the Pareto-front of the topology library is then calculated by the equations derived from collinearity theorem. After the local searching using Nelder-Mead method maps the calculated best solution back to design variable space, the non-dominated best solution is obtained. Comparing to the optimization methods using single-objective optimization algorithms, this work can efficiently find the best non-dominated solution from multiple topologies for different specifications without additional time-consuming optimizing iterations. The experiments demonstrate that this method is feasible and practical in actual analog designs especially for uncertain or different multidimensional specifications.
REFERENCES
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1
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|
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2
|
G. Gielen and R. Rutenbar, "Computer-aided design of analog and mixed-signal integrated circuits," Proceedings of the IEEE, vol. 88, no. 12, pp. 1825--1854, 2000.
|
| |
3
|
R. A. Rutenbar, G. G. E. Gielen, and J. Roychowdhury, "Hierarchical modeling, optimization, and synthesis for system-leval analog and rf designs," Proceedings of the IEEE, vol. 95, no. 3, pp. 640--669, 2007.
|
| |
4
|
K. Oda, L. Prado, and A. J. Gadient, "A new methodology for analog/mixed-signal (ams) soc design that enables ams design reuse and achieves full-custom performance," in Proc. ACM/IEEE Electronic Design Processes Workshop, Apr. 2002.
|
 |
5
|
|
| |
6
|
|
| |
7
|
V. Pareto and A. S. Schwier (english translator), Manual of Political Economy. Origianl in Italian in 1906, English version is published by Macmillan, New York, in 1971.
|
| |
8
|
S. K. Tiwary, S. Velu, R. A. Rutenbar, and T. Mukherjee, "Pareto optimal modeling for efficient pll optimization," NSTI-Nanotech, vol. 2, pp. 195--198, 2004.
|
 |
9
|
|
 |
10
|
Daniel Mueller , Guido Stehr , Helmut Graeb , Ulf Schlichtmann, Deterministic approaches to analog performance space exploration (PSE), Proceedings of the 42nd annual conference on Design automation, June 13-17, 2005, Anaheim, California, USA
[doi> 10.1145/1065579.1065807]
|
 |
11
|
Jun Zou , Daniel Mueller , Helmut Graeb , Ulf Schlichtmann, A CPPLL hierarchical optimization methodology considering jitter, power and locking time, Proceedings of the 43rd annual conference on Design automation, July 24-28, 2006, San Francisco, CA, USA
[doi> 10.1145/1146909.1146919]
|
 |
12
|
|
| |
13
|
|
| |
14
|
Tom Eeckelaert , Raf Schoofs , Georges Gielen , Michiel Steyaert , Willy Sansen, An efficient methodology for hierarchical synthesis of mixed-signal systems with fully integrated building block topology selection, Proceedings of the conference on Design, automation and test in Europe, April 16-20, 2007, Nice, France
|
| |
15
|
K. Deb, A. Pratap, S. Agarwal, and T. Meyarivan, "A fast and elitist multiobjective genetic algorithm NSGA-II," IEEE Trans. on Evolutionary Computation, vol. 6, no. 2, pp. 182--197, 2002.
|
| |
16
|
|
| |
17
|
E. M. Kasprzak and K. E. Lewis, "Pareto analysis in multiobjective optimization using the colinearity theorem and scaling method," Structural and Multidisciplinary Optimization, vol. 22, no. 3, pp. 208--218, 2001.
|
| |
18
|
M. J. D. Powell, Numerical Methods for Nonlinear Algebraic Equations. Gordon and Breach, 1970.
|
| |
19
|
|
| |
20
|
R. G. Carvajal, J. R. Angulo, A. J. L. Martin, A. Torralba, J. A. G. Galan, A. Carlosena, and F. M. Chavero, "The flipped voltage follower: A useful cell for low-voltage low-power circuit design," IEEE Trans. on CAS-I, vol. 52, no. 7, pp. 1276--1291, 2005.
|
| |
21
|
J. J. F. Rijins, "CMOS low-distortion high-frequency variable-gain amplifier," IEEE Journal of Solid-State Circuits, vol. 31, no. 7, pp. 1029--1034, 1996.
|
|