| Noise minimization during power-up stage for a multi-domain power network |
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Asia and South Pacific Design Automation Conference
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Proceedings of the 2009 Asia and South Pacific Design Automation Conference
table of contents
Yokohama, Japan
SESSION: Signal/power integrity and simulation
table of contents
Pages 391-396
Year of Publication: 2009
ISBN:978-1-4244-2748-2
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Authors
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Wanping Zhang
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Qualcomm Inc., San Diego, CA and UC San Diego, La Jolla, CA
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Yi Zhu
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UC San Diego, La Jolla, CA
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Wenjian Yu
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Tsinghua University, Beijing, China
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Amirali Shayan
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UC San Diego, La Jolla, CA
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Renshen Wang
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UC San Diego, La Jolla, CA
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Zhi Zhu
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Qualcomm Inc., San Diego, CA
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Chung-Kuan Cheng
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UC San Diego, La Jolla, CA
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IEEE Press
Piscataway, NJ, USA
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Downloads (6 Weeks): 4, Downloads (12 Months): 30, Citation Count: 0
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ABSTRACT
With the popularity of Multiple Power Domain (MPD) design, the multi-domain power network noise analysis and minimization is becoming important. This paper describes an efficient heuristic algorithm to arrange the power-up sequence in a multi-domain power network in order to minimize the noise. We present a formulation of this problem and show it is NP-complete. Therefore, we propose a simulated annealing (SA) based algorithm with preprocessing. Experimental results show that the proposed algorithm can minimize the noise close to the minimal values. In terms of efficiency, the SA algorithm is more than hundreds of times faster than the enumerating method and the running time scales well for these cases with the number of domains. In addition, we discuss the trade off between power-up efficiency and noise.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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