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Variability-aware robust design space exploration of chip multiprocessor architectures
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Asia and South Pacific Design Automation Conference archive
Proceedings of the 2009 Asia and South Pacific Design Automation Conference table of contents
Yokohama, Japan
SESSION: System level architectures table of contents
Pages 323-328  
Year of Publication: 2009
ISBN:978-1-4244-2748-2
Authors
Gianluca Palermo  Politecnico di Milano
Cristina Silvano  Politecnico di Milano
Vittorio Zaccaria  Politecnico di Milano
Sponsors
: IEEE Circuits and Systems Society
SIGDA: ACM Special Interest Group on Design Automation
IEICE ESS : Institute of Electronics, Information and Communication Engineers - Engineering Sciences Society
IPSJ SIGSLDM : Information Processing Society of Japan - SIG System LSI Design Methodology
Publisher
IEEE Press  Piscataway, NJ, USA
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Downloads (6 Weeks): 4,   Downloads (12 Months): 27,   Citation Count: 0
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ABSTRACT

In the context of a design space exploration framework for supporting the platform-based design approach, we address the problem of robustness with respect to manufacturing process variations. First, we introduce response surface modeling techniques to enable an efficient evaluation of the statistical measures of execution time and energy consumption for each system configuration. We then introduce a robust design space exploration framework to afford the problem of the impact of manufacturing process variations onto the system-level metrics and consequently onto the application-level constraints. We finally provide a comparison of our design space exploration technique with conventional approaches.1


REFERENCES

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Collaborative Colleagues:
Gianluca Palermo: colleagues
Cristina Silvano: colleagues
Vittorio Zaccaria: colleagues