Using a dataflow abstracted virtual prototype for HdS-design

ABSTRACT

The complexity of Hardware-dependent Software (HdS) continuously grows faster than chip complexity since more and more tasks are moved to software. Clearly, the pressure on the development of new methodologies for early validation of HdS increases as well. Existing methods must be continuously improved and new methods must be developed. This is exemplified with an state-of-the-art Transaction Level (TL) model used for firmware development of a productive wireless communication chip. By discussing the strengths and shortcomings of TL modeling we derive a set of requirements for a future modeling paradigm, which led to the new data flow abstraction approach presented in this paper. Experiments showed that we gain up to 10x performance improvement.

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